Commit cac871d9 authored by Sam Calisch's avatar Sam Calisch

added second hall effect for differential measurement

parent 78599de6
Pipeline #724 passed with stage
in 3 seconds
bc832-watt/bc832-watt-interior.png

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bc832-watt/bc832-watt-layout.png

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...@@ -30,7 +30,7 @@ class TagConnectSWD(Component): ...@@ -30,7 +30,7 @@ class TagConnectSWD(Component):
_pad = s2d.circle(0,0,.5*.031) _pad = s2d.circle(0,0,.5*.031)
_via = s2d.circle(0,0,.5*.039) _via = s2d.circle(0,0,.5*.039)
pins = [ pins = [
Pin(-.05,-.025,_pad,'GND2',label_size=.012), Pin(-.05,-.025,_pad,'VCC',label_size=.012),
Pin( .00,-.025,_pad,'TX',label_size=.012), Pin( .00,-.025,_pad,'TX',label_size=.012),
Pin( .05,-.025,_pad,'RX',label_size=.012), Pin( .05,-.025,_pad,'RX',label_size=.012),
Pin(-.05,.025,_pad,'GND',label_size=.012), Pin(-.05,.025,_pad,'GND',label_size=.012),
...@@ -140,12 +140,12 @@ class Plug(Component): ...@@ -140,12 +140,12 @@ class Plug(Component):
hw = .25 hw = .25
pin_os = -.15#.22 pin_os = -.15#.22
pins = [ pins = [
Pin(-hw-pin_os,-.03,pad,'N'), Pin(-hw-pin_os,0,pad,'N'),
Pin( hw+pin_os,-.03,pad,'L')] Pin( hw+pin_os+.02,0,pad,'L')]
vias = [ vias = [
Via(-hw,.25,rectangle(-.032,.032,-.157,.157)), Via(-hw,.25,rectangle(-.032,.032,-.157,.157)),
Via(hw,.25,rectangle(-.032,.032,-.127,.127)), Via(hw,.25,rectangle(-.032,.032,-.127,.127)),
Via(0,-.25,circle(0,0,.1)) Via(0,-.245,circle(0,0,.102))
] ]
class DRV5053(Component): class DRV5053(Component):
...@@ -159,6 +159,16 @@ class DRV5053(Component): ...@@ -159,6 +159,16 @@ class DRV5053(Component):
] ]
vias = [Via(0,0,rectangle(-.03,.03,-.28,0))] vias = [Via(0,0,rectangle(-.03,.03,-.28,0))]
class DRV5053B(Component):
#nonstandard mounting of TO-92 hall effect sensor
pad = rectangle(0,.1,-.016,.016)
pins = [
Pin(-.03,-.165,reflect_x(pad),'VCC'),
Pin(-.03,-.215,reflect_x(pad),'GND'),
Pin(-.03,-.265,reflect_x(pad),'SIG')
]
vias = [Via(0,0,rectangle(-.03,.03,-.28,0))]
class BC832(Component): class BC832(Component):
#Fanstel BC832 micro nrf52 module #Fanstel BC832 micro nrf52 module
...@@ -180,8 +190,11 @@ class BC832(Component): ...@@ -180,8 +190,11 @@ class BC832(Component):
pins += [ pins += [
Pin(-c+2.15/25.4,-y_os+.519/25.4,_pad_lga,'P8',label_size=.01), Pin(-c+2.15/25.4,-y_os+.519/25.4,_pad_lga,'P8',label_size=.01),
Pin(-c+2.15/25.4,-y_os+(1.2+.519)/25.4,_pad_lga,'P6',label_size=.01), Pin(-c+2.15/25.4,-y_os+(1.2+.519)/25.4,_pad_lga,'P6',label_size=.01),
Pin(-c+2.15/25.4,-y_os+(2*1.2+.519)/25.4,_pad_lga,'A2',label_size=.01),
Pin(-c+2.15/25.4,-y_os+(4*1.2+.519)/25.4,_pad_lga,'A4',label_size=.01), Pin(-c+2.15/25.4,-y_os+(4*1.2+.519)/25.4,_pad_lga,'A4',label_size=.01),
#Pin(-c+2.15/25.4,-y_os+(3*1.2+.519)/25.4,_pad_lga,'',label_size=.01), #Pin(-c+2.15/25.4,-y_os+(3*1.2+.519)/25.4,_pad_lga,'',label_size=.01),
#Pin(-c+2.15/25.4+1.2/25.4,-y_os+(2*1.2+.519)/25.4,_pad_lga,'',label_size=.01),
#Pin(-c+2.15/25.4+1.2/25.4,-y_os+(3*1.2+.519)/25.4,_pad_lga,'',label_size=.01), #Pin(-c+2.15/25.4+1.2/25.4,-y_os+(3*1.2+.519)/25.4,_pad_lga,'',label_size=.01),
#Pin(-c+2.15/25.4+1.2/25.4,-y_os+(4*1.2+.519)/25.4,_pad_lga,'',label_size=.01), #Pin(-c+2.15/25.4+1.2/25.4,-y_os+(4*1.2+.519)/25.4,_pad_lga,'',label_size=.01),
#Pin(-c+2.15/25.4+2*1.2/25.4,-y_os+(3*1.2+.519)/25.4,_pad_lga,'',label_size=.01), #Pin(-c+2.15/25.4+2*1.2/25.4,-y_os+(3*1.2+.519)/25.4,_pad_lga,'',label_size=.01),
...@@ -197,7 +210,7 @@ class Hole(Component): ...@@ -197,7 +210,7 @@ class Hole(Component):
tap = circle(0,0,.5*1.9/25.5) tap = circle(0,0,.5*1.9/25.5)
width = 1. width = 1.03
height = 1.6 height = 1.6
pcb = PCB(0,0,width,height,chamfer_distance=.07) pcb = PCB(0,0,width,height,chamfer_distance=.07)
...@@ -222,7 +235,7 @@ reg = Regulator_SOT23(pow.x+.135,pow['GND'].y-.01,-180,'3.3v') ...@@ -222,7 +235,7 @@ reg = Regulator_SOT23(pow.x+.135,pow['GND'].y-.01,-180,'3.3v')
pcb += reg pcb += reg
pcb.connectV(pow['GND'],reg['GND'],width=.02) pcb.connectV(pow['GND'],reg['GND'],width=.02)
pcb.connectD(reg['IN'],[reg['IN'].x,pow['VCC'].y-.03],pow['VCC'],width=.02) pcb.connectD(reg['IN'],[reg['IN'].x-.09,reg['IN'].y+.02],pow['VCC'],width=.02)
C_in = C_0805(reg.x+.17,reg.y+.01,90,'Cin\n.1uF',label_size=.02) C_in = C_0805(reg.x+.17,reg.y+.01,90,'Cin\n.1uF',label_size=.02)
pcb += C_in pcb += C_in
...@@ -251,7 +264,7 @@ pcb.connectD(bc['P8'],[swd['TX'].x+.03,swd['TX'].y-.05],swd['TX'],width=.014) ...@@ -251,7 +264,7 @@ pcb.connectD(bc['P8'],[swd['TX'].x+.03,swd['TX'].y-.05],swd['TX'],width=.014)
button = Button(pow.x-.01,pow.y+.23,0) button = Button(pow.x-.01,pow.y+.27,0)
pcb += button pcb += button
pcb.connectH(pow['GND'],[button[1].x-.06,button[1].y],button[1]) pcb.connectH(pow['GND'],[button[1].x-.06,button[1].y],button[1])
...@@ -263,24 +276,22 @@ pcb += C2 ...@@ -263,24 +276,22 @@ pcb += C2
pcb.connectV(C2[1],C_in[1],width=.02) pcb.connectV(C2[1],C_in[1],width=.02)
pcb.connectH(C2[0],C_out[0],width=.02) pcb.connectH(C2[0],C_out[0],width=.02)
pcb.connectH(swd[4],swd[1])
pcb.connectD(swd['GND'],button[2]) pcb.connectD(swd['GND'],button[2])
R1 = R_0805(C_in.x+.08,bc['RESET'].y+.03,90,'10k',label_size=.03) R1 = R_0805(C_in.x+.08,bc['RESET'].y+.03,90,'10k',label_size=.03)
pcb += R1 pcb += R1
pcb.connectH(bc['RESET'],[bc['RESET'].x,bc['RESET'].y+.05],R1[0],width=.012) pcb.connectH(bc['RESET'],[bc['RESET'].x,bc['RESET'].y+.05],R1[0],width=.012)
pcb.connectH(C2[0],[C2[0].x,C2[0].y-.06],R1[1]) pcb.connectH(C2[0],[C2[0].x,C2[0].y-.06],R1[1])
pcb.connectD(R1[0],[R1[0].x,R1[0].y+.06],[R1[0].x-.16,R1[0].y+.095],[button[0].x+.04,button[0].y-.05],button[0]) pcb.connectD(R1[0],[R1[0].x,R1[0].y+.06],[R1[0].x-.28,R1[0].y+.095],[button[0].x+.02,button[0].y],button[0])
pcb.connectV(pow['3V3'],[C2[0].x,C2[0].y-.06],C2[0]) pcb.connectV(pow['3V3'],[C2[0].x,C2[0].y-.06],C2[0])
pcb.connectH(R1[1],[R1[1].x,R1[1].y-.08],[bc['VDD'].x,R1[1].y-.08],bc['VDD'],sides=[0,1,0]) pcb.connectH(R1[1],[R1[1].x,R1[1].y-.08],[bc['VDD'].x,R1[1].y-.08],bc['VDD'],sides=[0,1,0])
pcb.connectD(swd['VCC'],[pow['VCC'].x+.03,pow['VCC'].y+.05],pow['VCC']).add_jumper([button[2].x+.02,button[2].y-.155],0,width=.12,thick=.06,height=.055)
plug = Plug(.6,.5,90) plug = Plug(.6,.5,90)
pcb += plug pcb += plug
...@@ -295,9 +306,23 @@ pcb += drv ...@@ -295,9 +306,23 @@ pcb += drv
pcb.connectD(drv['SIG'],[drv['SIG'].x,drv['SIG'].y+.2],bc['A1']) pcb.connectD(drv['SIG'],[drv['SIG'].x,drv['SIG'].y+.2],bc['A1'])
pcb.connectD(drv['VCC'],[drv['VCC'].x,drv['VCC'].y+.1],R1[1]) pcb.connectD(drv['VCC'],[drv['VCC'].x,drv['VCC'].y+.1],R1[1])
pcb.connectD(drv['GND'],[drv['GND'].x,drv['GND'].y+.18],[pow['GND'].x-.1,drv['GND'].y+.24],[pow['GND'].x-.15,pow['GND'].y],pow['GND']).add_jumper([drv['GND'].x-.13,drv.y+.25],0) pcb.connectD(drv['GND'],[drv['GND'].x,drv['GND'].y+.18],[pow['GND'].x-.1,drv['GND'].y+.24],[pow['GND'].x-.15,pow['GND'].y],pow['GND']).add_jumper([drv['GND'].x-.13,drv.y+.25],0)
pcb.connectD(plug[0],[plug[0].x+.06,plug[0].y+.04],[plug[0].x+.13,plug[0].y+.04],[bc['XL2'].x+.07,bc['XL2'].y-.17],bc['XL2']) #pcb.connectD(plug[0],[plug[0].x+.06,plug[0].y+.04],[plug[0].x+.13,plug[0].y+.04],[bc['XL2'].x+.07,bc['XL2'].y-.17],bc['XL2'])
pcb.connectD(plug[1],[width-.1,plug[1].y-.05],[width-.02,bc.y-.35],bc['A0']) pcb.connectD(plug['L'],[plug['L'].x+.03,plug['L'].y],[plug['L'].x+.19,plug['L'].y+.09],[bc['XL1'].x+.09,bc['XL1'].y-.17],bc['XL1'])
pcb.connectD(plug['N'],[plug[0].x,plug['N'].y+.09],[plug['N'].x+.08,plug['N'].y+.18],[bc['XL2'].x+.07,bc['XL2'].y-.5],[bc['XL2'].x+.09,bc['XL2'].y-.15],bc['XL2'])
#pcb.connectD(plug['N'],[width-.1,plug[1].y-.05],[width-.02,bc.y-.35],bc['A0'])
pcb.connectD(bc['A4'],[bc['A4'].x-.6/25.4,bc['XL2'].y+.06],bc['XL2'],width=.012) pcb.connectD(bc['A4'],[bc['A4'].x-.6/25.4,bc['XL2'].y+.06],bc['XL2'],width=.012)
pcb.connectD(bc['A2'],[bc['A2'].x+.6/25.4,bc['XL1'].y+.06],bc['XL1'],width=.012)
drvb = DRV5053B(plug.x-.125+core_gap+.03,plug.y-.25,90,'drv3035')
pcb += drvb
pcb.connectD(drvb['VCC'],[drvb['VCC'].x,drvb['VCC'].y-.15],[drvb['VCC'].x+.24,drvb['VCC'].y-.2],[bc['VDD'].x+.06,bc['VDD'].y-.12],bc['VDD'])
pcb.connectD(drvb['GND'],[drvb['GND'].x,drvb['GND'].y-.12],[drvb['GND'].x+.15,drvb['GND'].y-.15],[bc['VDD'].x+.02,bc['VDD'].y-.16],[bc['VDD'].x+.01,bc['VDD'].y-.16],[bc['VDD'].x-.48,bc['VDD'].y-.16],[bc['VDD'].x-.51,bc['VDD'].y-.15],sides=[0,0,0,0,1,0])
#pcb.connectD(drvb['SIG'],[drvb['SIG'].x,drvb['SIG'].y+.1],[drvb['SIG'].x+.1,drvb['SIG'].y+.1],[drvb['SIG'].x+.18,drvb['SIG'].y+.3],[bc['A0'].x+.08,bc['A0'].y-.12],bc['A0'])
pcb.connectD(drvb['SIG'],[drvb['SIG'].x,drvb['SIG'].y-.05],[drvb['SIG'].x+.05,drvb['SIG'].y-.05],[drvb['SIG'].x+.05,drvb['SIG'].y+.08],[drvb['SIG'].x-.08,drvb['SIG'].y+.33],[drvb['SIG'].x+.08,drvb['SIG'].y+.4],[bc['A0'].x+.09,bc['A0'].y-.13],bc['A0'])
core_r = filleted_rectangle(-.125-core_gap-core_w,.125+core_gap+core_w,-.03-core_gap-core_w,.03+core_gap+core_w,core_w) core_r = filleted_rectangle(-.125-core_gap-core_w,.125+core_gap+core_w,-.03-core_gap-core_w,.03+core_gap+core_w,core_w)
core_r -= rectangle(-.125-core_gap,.125+core_gap,-.03-core_gap,.03+core_gap,) core_r -= rectangle(-.125-core_gap,.125+core_gap,-.03-core_gap,.03+core_gap,)
...@@ -315,6 +340,7 @@ if topside: ...@@ -315,6 +340,7 @@ if topside:
pocket += circle(plug[1].x,plug[1].y,.06) pocket += circle(plug[1].x,plug[1].y,.06)
pocket += circle(plug[0].x,plug[0].y,.06) pocket += circle(plug[0].x,plug[0].y,.06)
pocket += rectangle(drv[2].x-.12, drv[2].x+.1, drv.y-.03, drv.y+.15) pocket += rectangle(drv[2].x-.12, drv[2].x+.1, drv.y-.03, drv.y+.15)
pocket += rectangle(drvb[2].x-.12, drvb[2].x+.1, drvb.y-.15, drvb.y+.03)
pcb.height=.97 pcb.height=.97
pcb.add_custom_layer("pocket",pocket,(250,0,100)) pcb.add_custom_layer("pocket",pocket,(250,0,100))
......
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