From 33a46b243a0f204f3ade095f7b213d9d2598c450 Mon Sep 17 00:00:00 2001
From: Dean Camera <dean@fourwalledcubicle.com>
Date: Fri, 11 Dec 2009 04:56:52 +0000
Subject: [PATCH] PDI NVM enable is fast enough that bare polling is enough
without a fixed delay in between each attempt. Make sure the USART
transmitter is enabled explicitly when the USART is configured, so that
repeated attempts to re-enter PDI mode don't fail due to TXEN not being set.
---
Projects/AVRISP/Lib/PDIProtocol.c | 4 +---
Projects/AVRISP/Lib/PDITarget.c | 8 +++++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Projects/AVRISP/Lib/PDIProtocol.c b/Projects/AVRISP/Lib/PDIProtocol.c
index 32a74c586..2107e2b89 100644
--- a/Projects/AVRISP/Lib/PDIProtocol.c
+++ b/Projects/AVRISP/Lib/PDIProtocol.c
@@ -115,11 +115,9 @@ static void PDIProtocol_EnterXPROGMode(void)
PDITarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);
/* Poll the STATUS register to check to see if NVM access has been enabled */
- uint8_t NVMAttemptsRemaining = 150;
+ uint8_t NVMAttemptsRemaining = 255;
while (NVMAttemptsRemaining)
{
- _delay_ms(1);
-
PDITarget_SendByte(PDI_CMD_LDCS | PD_STATUS_REG);
if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
break;
diff --git a/Projects/AVRISP/Lib/PDITarget.c b/Projects/AVRISP/Lib/PDITarget.c
index 22a4d019a..eb16e0a28 100644
--- a/Projects/AVRISP/Lib/PDITarget.c
+++ b/Projects/AVRISP/Lib/PDITarget.c
@@ -173,6 +173,7 @@ void PDITarget_EnableTargetPDI(void)
/* Set up the synchronous USART for XMEGA communications -
8 data bits, even parity, 2 stop bits */
UBRR1 = 10;
+ UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
@@ -182,9 +183,10 @@ void PDITarget_EnableTargetPDI(void)
void PDITarget_DisableTargetPDI(void)
{
- /* Turn of receiver and transmitter of the USART, clear settings */
- UCSR1B = 0;
- UCSR1C = 0;
+ /* Turn off receiver and transmitter of the USART, clear settings */
+ UCSR1A |= (1 << TXC1) | (1 << RXC1);
+ UCSR1B = 0;
+ UCSR1C = 0;
/* Set all USART lines as input, tristate */
DDRD &= ~((1 << 5) | (1 << 3));
--
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