Commit b18830e6 authored by Jake Read's avatar Jake Read

v0.4 ready for double checking, fab

parent da90bfb6
......@@ -62,30 +62,10 @@ And the full schematic
### BLDC:
need to add:
hella vias
- gnd around drv
- ultra mega vcc heatsink under fets
- around phases
- route sense lines (yikes)
- route logic ...
- pull that 3v3 out to thermistor
finishing:
- overall due dilligence
- verify you can SSI with those pins
- silk:
- debug names
- phase names
- heatsink lands
-
split gnd plane power -> logic
- bk does this thru a 0 ohm resistor
footprint update
- and thermistor on that: loop does safe shutdown on big heat for safe search
- Capacitor Offboard Board Board for ultra-mega
- Capacitor lay-down beside for on-board for 1000uF or so
- do ssi encoder board, with one cap, led option
order:
- 2512 Shunts
......
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......@@ -1952,7 +2062,26 @@ design rules under a new name.</description>
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