diff --git a/log/fab-step-log.md b/log/fab-step-log.md
index dca9a10e50c77494a416061f497fb344be6c3b3b..38691bbde568f4341b6b48e20c1d1a96b0475356 100644
--- a/log/fab-step-log.md
+++ b/log/fab-step-log.md
@@ -153,4 +153,6 @@ So I have ordered this part `LS7366R-S` which is a hardware counter (SPI interfa
 
 For the interrupts - my beef is that I have some i.e. ~ 4us (?) interrupts happening pretty regularely on the UCBus, so adding this additional requirement is troublesome.
 
-I need to know if interrupts can interrupt others - haha - otherwise a 2us QDEC interrupt spacing on top of a 5us comms interrupt will miss a tick. 
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+I need to know if interrupts can interrupt others - haha - otherwise a 2us QDEC interrupt spacing on top of a 5us comms interrupt will miss a tick. 
+
+ARM has the NVIC - nested vector interrupt controller - so long as I put the quadrature interrupts as higher priority, it should be fine. Nice, this project goes back to bed... 
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