From c5937f430e1b5c090ab4e77071c8737d3cc347e3 Mon Sep 17 00:00:00 2001
From: Jake Read <jake.read@cba.mit.edu>
Date: Mon, 6 Dec 2021 13:40:13 -0500
Subject: [PATCH] last nvic note

---
 log/fab-step-log.md | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/log/fab-step-log.md b/log/fab-step-log.md
index dca9a10..38691bb 100644
--- a/log/fab-step-log.md
+++ b/log/fab-step-log.md
@@ -153,4 +153,6 @@ So I have ordered this part `LS7366R-S` which is a hardware counter (SPI interfa
 
 For the interrupts - my beef is that I have some i.e. ~ 4us (?) interrupts happening pretty regularely on the UCBus, so adding this additional requirement is troublesome.
 
-I need to know if interrupts can interrupt others - haha - otherwise a 2us QDEC interrupt spacing on top of a 5us comms interrupt will miss a tick. 
\ No newline at end of file
+I need to know if interrupts can interrupt others - haha - otherwise a 2us QDEC interrupt spacing on top of a 5us comms interrupt will miss a tick. 
+
+ARM has the NVIC - nested vector interrupt controller - so long as I put the quadrature interrupts as higher priority, it should be fine. Nice, this project goes back to bed... 
\ No newline at end of file
-- 
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