diff --git a/rpi_spi/2023-12-29_pi-spi-rates.md b/rpi_spi/2023-12-29_pi-spi-rates.md index 59c5b2fa21c888c93553b7fcfc306f6be5ddc41f..6ee0fa1618df5a295155f203e10e727b26f622e6 100644 --- a/rpi_spi/2023-12-29_pi-spi-rates.md +++ b/rpi_spi/2023-12-29_pi-spi-rates.md @@ -85,4 +85,20 @@ I have hello-worlded this with the Earle Core, but their SPI implementation is s I'm going a bit mad with this; I can get GPIO interrupts to fire *just on a falling edge* but not *just on a rising edge* ... I should see if I can access some lower level masks, or something? But it's genuinely sending events *marked* as *rising edge* events on falling and rising edges... -There's another oddity in here... the RP2040 only uses SPI framing where the CS line is pulsed per frame (7-16 bits), so we need to handle it in software, though IDK exactly how to do this as a peripheral, though apparently [this lad](https://github.com/raspberrypi/pico-sdk/issues/88#issuecomment-1402204730) found [a workaround?](https://github.com/uwopus/pico-code/blob/3594e67c1ac34e5454eb4db8362b673bcc7c8862/opus_comms/opus_comms.c#L44-L46) which references 4.4.3.13 \ No newline at end of file +There's another oddity in here... the RP2040 only uses SPI framing where the CS line is pulsed per frame (7-16 bits), so we need to handle it in software, though IDK exactly how to do this as a peripheral, though apparently [this lad](https://github.com/raspberrypi/pico-sdk/issues/88#issuecomment-1402204730) found [a workaround?](https://github.com/uwopus/pico-code/blob/3594e67c1ac34e5454eb4db8362b673bcc7c8862/opus_comms/opus_comms.c#L44-L46) which references 4.4.3.13 + +--- + +## Next + +- the SPI can work, I suspect + - probably needs that sweet sweet 250MHz-es + - can crank up to 16-bit words in the FIFO, for 2x less starvation + - can PIO do 32-bit words, perchance ? + - fire the interrupt on transmit buffer not-full, rather than half-full ? + - actually no interrupt exists for this + - can we do a proper echo test, then check for drops, etc, for max speed ? +- do the RP2040-to-RP2040 UART PIO test +- finish the thought, blog it up (1 day, max) +- take i.e. [notes](https://abyz.me.uk/rpi/pigpio/pigs.html), right ? + - incl. the maybe-likely-change to use PIO spi-slave, not this bs \ No newline at end of file diff --git a/rpi_spi/code/spi_peripheral_bare/spipi.cpp b/rpi_spi/code/spi_peripheral_bare/spipi.cpp index 8dd0e27eb3ec6bdf81002c9f8eb1f0a30d58ba4e..163758dabb775635a82df6faba0f7cddc1f8e1f2 100644 --- a/rpi_spi/code/spi_peripheral_bare/spipi.cpp +++ b/rpi_spi/code/spi_peripheral_bare/spipi.cpp @@ -25,7 +25,7 @@ #define PIN_RX 12 #define PIN_TX 11 -#define BITRATE 1000000 +#define BITRATE 10000000 #define SPI_INST spi1 #define SPI_HW spi_get_hw(SPI_INST) @@ -45,7 +45,7 @@ String spipi_print(void){ uint8_t txBuffer[255]; volatile uint8_t txPtr = 0; -volatile uint8_t txLen = 32; +volatile uint8_t txLen = 64; // we catch rising edges to delineate packet-end void spipi_gpio_irq_handler(uint gpio, uint32_t events){ @@ -57,15 +57,8 @@ void spipi_gpio_irq_handler(uint gpio, uint32_t events){ } void spipi_irq_handler(void){ - gpio_put(PIN_DEBUG, !gpio_get_out_level(PIN_DEBUG)); + // gpio_put(PIN_DEBUG, !gpio_get_out_level(PIN_DEBUG)); // both have up to 8 bytes to read / write per interrupt ? - // get bytes while readable, - for(uint8_t c = 0; c < 8; c ++){ - if(spi_is_readable(SPI_INST) && rxPtr < txLen){ - rxBuffer[rxPtr] = SPI_HW->dr; - rxPtr ++; - } - } // write bytes while writable for(uint8_t c = 0; c < 8; c ++){ if(spi_is_writable(SPI_INST) && txPtr < txLen){ @@ -73,10 +66,13 @@ void spipi_irq_handler(void){ txPtr ++; } } - // rx - // if we're out of data, we could turn interrupts off w/ this: - // i.e. *just* turning the RX-interrupt on... ?? - // SPI_HW->imsc = 0 | SPI_IMSC_RXIM_ON; + // get bytes while readable, + for(uint8_t c = 0; c < 8; c ++){ + if(spi_is_readable(SPI_INST) && rxPtr < txLen){ + rxBuffer[rxPtr] = SPI_HW->dr; + rxPtr ++; + } + } } @@ -120,4 +116,11 @@ void spipi_begin(void){ SPI_HW->imsc = SPI_IMSC_RXIM_ON | SPI_IMSC_TXIM_ON; irq_set_exclusive_handler(SPI1_IRQ, &spipi_irq_handler); irq_set_enabled(SPI1_IRQ, true); + + // preload the output ? + for(uint8_t c = 0; c < 8; c ++){ + if(spi_is_writable(SPI_INST)){ + SPI_HW->dr = c; + } + } }