diff --git a/circuit/README.md b/circuit/README.md
index 63efb96aac6b30590031667e9693a5d3614d5004..768ec17f0cc1d8f53477089bf5260cc2302f19e6 100644
--- a/circuit/README.md
+++ b/circuit/README.md
@@ -123,14 +123,34 @@ Fabricated
+## Bill of Materials
+
+| Part | Value | Package | Number | PN |
+| --- | --- | --- | --- | ---- |
+| C | 0.1uF | 0603 | 11 | - |
+| C | 22pF | 0603 | 2 | - |
+| C | 10pF | 0805 | 1 | - |
+| C | 0.47uF | 0805 | 4 | - |
+| C | 4.7uF | 0805 | 2 | - |
+| C | 22uF 16V | 0805 | 9 | - |
+| C | 47uF 16V | 1210 | 2 | - |
+| R | 2R2 | 0805 | 2 | - |
+| R | 1K | 0805 | 5 | - |
+| R | 2K2 | 0805 | 10 | - |
+| R | 5K62 | 0805 | 1 | - |
+| R | 10K | 0805 | 2 | - |
+| L | 10uH | 1812 | 2 | - |
+| Q | 12MHz | CT406 | 1 | - |
+| D | LEDRGBNEW | P-LCC-4 | 5 | - |
+| U | ISL3177E | MSOP8 | 4 | - |
+| U | ATSAMS70N | TQFP100 | 1 | - |
+| U | 3V3 Reg | SOT223 | 1 | - |
+| Connector | 02x04 Shrouded | - | 4 | - |
+| Switch | FAB Momentary | - | 2 | - |
+
+
## Incremental
next board
- tiny inductor filters on vddpll and vddoutmic, maybe shield usb, as this might work?
- if end of term / long time span, do v71 for usb dreams?
-
-order
- - 1k 0805
- - diff. chips
- - astams
- - or, draw up a BOM and order for 30 !
\ No newline at end of file
diff --git a/circuit/atsams70n-switch/README.md b/circuit/atsams70n-switch/README.md
deleted file mode 100644
index 5ec6e3c9ed68f6d335e304b91e2332dde53243fd..0000000000000000000000000000000000000000
--- a/circuit/atsams70n-switch/README.md
+++ /dev/null
@@ -1,515 +0,0 @@
-# A Router for TinyNet
-
-## Why
-
-This is board for switching UART signals in TinyNet. I wanted to keep some track of what I was doing, while I was doing it. So here it is.
-
-Originally, I had developed a switch on the XMEGA platform. I wanted to get into something a bit heavier duty, as I thought a really neat trick would be to out-perform switched ethernet, outright (for network control systems, not for datacenters). I think that in ARM chips there was enough speed to do this. Maximum UART bitrate is a function of the core clock speed (and in this case, the peripheral clock speed). I went straight to the 300MHz ATSAMx70 chips (M7 cores).
-
-Now, being more prudent I would do some tests with these chips first, but I'm not going to. This is foolish, I know that. Max UART on the ATSAMS70 is clk/16, so 18.75Mbps. It's not huge (relative ethernet), but it's fast enough for realtime small messages on small systems. In any case, I think the question is about system architecture more than it is about outright performance at this point.
-
-I also think that, for pure switching, an FPGA or PSOC would be a better answer. It probably is. I want to experiment with those during Networks week in [how to make](http://fab.cba.mit.edu/classes/863.17/CBA/people/jakeread/).
-
-However, I also want my network switches to double-duty as motor controllers, sensor interfaces, etc - do general embedded-stuff. In another world, where infinite time exists, I would put FPGAs on board with a processor. With the FPGA comes a chance to invent a whole new PHY - w/ 'co-clocking' and auto-maxing bitrates, which is something I am still really interested in implementing, but there are also machines to build. I leave that experiment for another bench.
-
-## The Chip
-
-First order was picking the right Microcontroller for the job. I want a lot of things, and I expect this chip to become the heart of *much* of the work I'll do during the next two years, so the datasheet stakes have never been so high.
-
-**I want a chip with: **
- - 5+ uarts
- - Big Clock Speed
- - DMA (direct memory access - peripherals write right into memory)
- - PWM's
- - ADC's
- - I2C
- - SPI
- - PIO (parallel input / output) is really exciting for communication
-
-##### M7's
-
-I ended up looking through Atmel's M4 and M7 Series of chips. These seem reasonably priced (actually cheap relative STM's). They're ARM, so the toolchain should be friendly to others. The M7's have a 300MHz clock that I'm getting childishly excited about.
-
-My one issue is that they are a bit too fancy, and don't have exactly the peripherals I want. The XMEGAs have like 12 UARTS etc, the M7's max out at 5, even with 144 pins.
-
-I can also tell that programming these is going to be ... well ... less straightforward.
-
-##### GO FOR
- - ATSAME70 - series - or ATSAMS70
- - E70 is 'industrial' - and S70 lacks an Ethernet Phy, but seems like it's way more popular...
- - oodles of peripherals
- - a chip you could drown in
- - 300MHz
- - did I mention peripherals?
- - $8 ... a good middle ground
-
-#### ATSAMS70N20
- - Exact PN ATSAMS70N20A-AN
- - N19: 512kb Flash, N20: 1024, N21: 2048
- - 300MHz
- - OOF: Need S70N-series for USART / SPI (has 100 pins :|)
- - Do LQFP for 14.5x14.5mm IC: TFBGA available, is 9x9mm
- - **Reads the datasheet**
- - print p. 1 -> 31 pins
- - print p. 77 -> 84 debug
- - p. 279 -> 346 clock / pmic
- - p. 346 -> 421 pio (gpio)
- - print p. 1093 -> 1117 uart
- - print p. 756 -> 788 spi
- - p. 831 -> 835 brief twi (i2c)
- - p. 964 - 968 brief usart
- - print p. 1178 -> 1186 -> 1282 pwm
- - p. 1283 -> 1288 afec (adc) brief
- - p. 158 -> 164 Power
- - p. 1554 -> 1574 Schematics
-
- - UART max clock is the Peripheral Clock or the PMC PCK - divided by 16. PMC PCK is an external clock, so UART clock can remain independent of processor clock.
- - So we can have (as measured) 22.8Mbps UART - into high-speed bouncy signal land. Exciting.
-
-## Bonus Breakout
-
-I want the following (or similar) pinouts coming off of the network node - to do *other stuff* with - i.e. motor control, sensing etc. Particularely, in a first rev of this board I am designing alongside my [bldc motor driver](https://gitlab.cba.mit.edu/jakeread/mkbldcdriver) project.
-
- - 1x UART
- - 1x SPI w/ 4 cs, 1 for slave select
- - 1-2x i2c
- - 8-12x PWM, pairs three
- - all dac
- - 8-12 adc
-
-In the end, at this iteration, I have
-
- - 1 UART
- - 1 I2C (I2C and UART share one pin, so cannot be used at the same time)
- - 1 SPI w/ 2 Chip Selects
- - 1 USART w/ 2 Chip Selects (USART can be configured to do UART, or SPI, or a Clocked Serial line of your design)
- - 8 PWM's on 4 channels (hi/lo - this is designed for driving half bridges for motor control)
- - 4 Analog to Digital Converters (I am less pleased with this and want more...)
- - 3 Spare GPIO
-
-Notes on this so far
- - More ADC's please
- - Pin headers could be split - to be breadboard friendly, and to offer some stability between layers
-
-# Board Design
-
-The first thing I did was to get into the datasheet. You can see that in the notes above. I am doing pinouts, figuring what I want on board. I am going to set this up as a kind of modular getdown, where the switch has a board interconnect, and I can build other PCBs w/ different hardwares to ride below. I.E motor controllers, sensor interfaces, human interfaces (!). Picking the set of pins I wanted to pull out of the chip was actually a bit painful. I'm sure I'll go through this more than once.
-
-For JTAG Pinouts, I referenced the Tag-Connect footprint (available for download from Tag-Connect) and the ATSAM note here - http://www.atmel.com/webdoc/atmelice/atmelice.using_ocd_physical_jtag.html see Fig. 18. They match, so I don't have to do any footwork here. Nice.
-
-I'm going to look at the board interconnect - to decide how many pins I want, I need to look at some applicaitons. I designed a Brushless Speed Controller last year, and this had me maxing out pins (for the first time!) I am going to use that as a starting point, and add I2C, which I know is common, and some other whatsits.
-
-- 3v3
-- GND (probably multiple - but want to keep clear signal / power GND separations. Alternately, spec for board-interconnect standoffs to do heavy ground lifting?
-- PWM / GPIO x 18
-- ADC x 6
-- SPI x 2 x 2 CS (10)
-- I2C (2)
-- DAC x 1
-- Seems like 40 is right, ~ 41.
-
-I have been tempted to buy some fancy 'mezannine' connectors - but I ended up (after a few cycles) deciding to stick with a 2x20 2.54mm pitch connector. This way just about everyone will have access to the hardware, and I like that! It's also the same pitch as most IDC connectors, breadboards, etc - so hopping around between systems should be easy. I am almost tempted to split the pins a bit so that it could get right into a breadboard - or do an edge-style bb, but this seems like too much give in that direction.
-
-OK, Here's my schematic
-
-
-
-And the board
-
-
-
-Fabricated
-
-
-
-# Programming
-
-It turns out this chip defaults to SWD, not JTAG. Should have read the datasheet more carefully. Also, I forgot to order the tag-connect for this number of pins...
-
-
-
-### PIO
-
-Here I am using the PIO peripheral (which also handles multiplexing for other peripherals) to turn one of my LED's on and off
-
-```C
-
-/*
- * atsams70-router.c
- *
- * Created: 11/18/2017 1:52:54 AM
- * Author : Jake
- */
-
-
-#include "sam.h"
-
-
-int main(void)
-{
- // Initialize the SAM system
- SystemInit();
-
- // startup the PIOA peripheral clock - only necessary for Inputs and Interrupts
- PMC->PMC_PCER0 = 1 << ID_PIOA;
-
- // Peripheral Enable Register
- // Set PER to 1 at the pin to enable the PIO peripheral,
- // set PDR (peripheral disable register) to 1 to clear that, opening the pin up for other peripherals (uart, etc)
- PIOA->PIO_PER |= PIO_PER_P28_Msk;
- // Output Enable Register
- PIOA->PIO_OER = PIO_PER_P28_Msk;
-
- while (1)
- {
- // Clear Output Data Register (open drain)
- PIOA->PIO_CODR = PIO_PER_P28_Msk;
- // Set Output Data Register (voltage)
- PIOA->PIO_SODR = PIO_PER_P28_Msk;
- }
-}
-
-
-```
-
-### ASF and Delay
-
-ASF is Atmel Software Framework - from within Atmel Studio 7, ASF makes it easy to turn hardware peripherals on / off. It's kind of like a more-intense Arduino, in that it allows you to avoid digging in the Registers to do stuff.
-
-I'm more interested in doing the register digging, that way it seems easier to share and replicate code (no laundry list of dependencies to build and share) and it offers a future where I'm not in Atmel Studio 7, because *boo* proprietary software...
-
-But I do want a delay function, if only to test turning this light on and off. And, to be real, I think I want to use Atmel's USB CDC drivers as well - so that I can have a serial port enumerated real quick.
-
-To use ASF, I also need to have a 'board' defined - this is like a hardware abstraction layer (HAL ... 9000). This is all explained as you go to ASF -> ASF Wizard in the top menu.
-
-Now that I have this defined (a board) the build takes a LONG time. I am also getting a lot of errors, I think I'm going to start a new ASF project from scratch.
-
-That's a lot better, I think.
-
-To set the clock, I'm looking at 31.17 in the datasheet.
-
-OK, F this, I went to http://asf.atmel.com/docs/latest/sam.drivers.mcan.quick_start.samv71_xplained_ultra/html/sysclk_quickstart.html and used ASF. I didn't need to configure anything other than setting up a #define BOARD_FREQ_MAINCK_XTAL (12000000UL) in my conf_board.h file. Nice. It's happily trucking at 300MHz now.
-
-Here we are doing a GPIO Input
-
-```C
-#include <asf.h>
-
-int main (void)
-{
- /* Insert system clock initialization code here (sysclk_init()). */
-
- board_init();
- sysclk_init();
-
- /* Insert application code here, after the board has been initialized. */
- // startup the PIOA peripheral clock - only necessary for Inputs and Interrupts
- PMC->PMC_PCER0 = 1 << ID_PIOA;
-
- // Peripheral Enable Register
- // Set PER to 1 at the pin to enable the PIO peripheral,
- // set PDR (peripheral disable register) to 1 to clear that, opening the pin up for other peripherals (uart, etc)
- PIOA->PIO_PER |= PIO_PER_P28 | PIO_PER_P15;
- // Output Enable Register
- PIOA->PIO_OER = PIO_PER_P28;
- // Output Disable Register
- PIOA->PIO_ODR = PIO_PER_P15;
- // B1 pulls PA15 to GND
-
- while (1) {
- // Clear Output Data Register (open drain)
- if(PIOA->PIO_PDSR & PIO_PER_P15){
- PIOA->PIO_CODR = PIO_PER_P28;
- } else {
- PIOA->PIO_SODR = PIO_PER_P28;
- }
- }
-}
-```
-
-### Ring Test
-
-On the ring test, I'm getting a jumping value between 3.9MHz and 5.7MHz,
-
-pics
-
-I'm hoping that the peripheral clock is set up on a different clock source than the main chip, as that's about 100 processor ticks between pin inversions, which is kind of unsatisfying.
-
-So I couldn't find any way to change the clock frequency for PIO pins (although there are separate clocks for UART/USART and for the USB) but I did try putting the input on Port A and the Output on Port D, this put the ring back at 5.77MHz (173ns period). Here's the code I was running
-
-```C
-
-#include <asf.h>
-
-// Ring is PD1 and PD2
-// try PA17 and PD7
-
-int main (void)
-{
- /* Insert system clock initialization code here (sysclk_init()). */
-
- board_init();
- sysclk_init();
-
- /* Insert application code here, after the board has been initialized. */
- // startup the PIOA peripheral clock - only necessary for Inputs and Interrupts
- PMC->PMC_PCER0 = 1 << ID_PIOA;
- PMC->PMC_PCER0 = 1 << ID_PIOD; // to figure out what PCERx to write to, evaluate ID_yourperipheral, and look up on datashsheet p. 308 or 331
-
- // Peripheral Enable Register
- // Set PER to 1 at the pin to enable the PIO peripheral,
- // set PDR (peripheral disable register) to 1 to clear that, opening the pin up for other peripherals (uart, etc)
- PIOA->PIO_PER |= PIO_PER_P17;
- PIOD->PIO_PER |= PIO_PER_P1 | PIO_PER_P2 | PIO_PER_P7;
- // Output Enable Register
- PIOA->PIO_OER = PIO_PER_P17;
- PIOD->PIO_OER = PIO_PER_P1;
- // Output Disable Register
- PIOD->PIO_ODR = PIO_PER_P7;
- PIOD->PIO_ODR = PIO_PER_P2;
- // B1 pulls PA15 to GND
-
- while (1) {
- if(REG_PIOD_PDSR & PIO_PER_P7){
- REG_PIOA_CODR = PIO_PER_P17;
- } else {
- REG_PIOA_SODR = PIO_PER_P17;
- }
- }
-}
-```
-
-### UART
-
-OK, now I'm going to go about setting up the UART, and see if I can push the bitrate *really* high.
-
-Drove it up to 22.8 MHz (= 22.8 MBps) and saw some pretty gnar gnar ringing... I'm using a differential driver.
-
-- pic
-
-I'm a little curious if it's maybe better to just drive right out of the logic level? It's a similar amount of bouncy... but with the differtial you take the difference, so ... in this photo Channel 2 (blue) is the logic level, and Channel 1 (yellow) is coming through the differential driver. I'm also curious if this can be chilled out with a tiny capacitor to ground... seems dubious. But in an exciting development I am into high speed signals land. Weeee. I would also be curious to see what a terminating resistor might do. I think, maybe not much? Update: basically this just attenuates the signal. My understanding is that terminating resistors (that span the + and - sides of the differential) are just meant to get rid of reflections.
-
-- pic
-
-Here's the barebones code I'm running
-
-```C
-
-#include <asf.h>
-
-// P4LR is PD13
-// Ring is PD1 and PD2
-// try PA17 and PD7
-
-// https://devel.rtems.org/browser/rtems/c/src/lib/libbsp/arm/atsam/libraries/libchip/source/uart.c?rev=e1eeb883d82ce218c2a9c754795cb3c86ac0f36d
-
-int main (void)
-{
- /* Insert system clock initialization code here (sysclk_init()). */
-
- board_init();
- sysclk_init();
-
- PMC->PMC_PCER0 = 1 << ID_PIOD;
- PIOD->PIO_OER = PIO_PER_P13;
-
- // P4RX -> URXD4 -> PD18
- // P4TX -> UTXD4 -> PD19
-
- PMC->PMC_PCER1 = 1 << 14; // ID is 44, position in this register is 12. datasheet p. 331 *shrugguy*
-
- // configure the pins for uart4
- // see datasheet 32.5.2 and 32.5.3
- PIOD->PIO_PDR = PIO_PER_P18; // see if we can combine once working
- PIOD->PIO_PDR = PIO_PER_P19;
-
- // we want peripheral c for both pins
- // abcdsr1 -> 0 abcdsr2 -> 1
- PIOD->PIO_ABCDSR[0] = ~PIO_PER_P18;
- PIOD->PIO_ABCDSR[0] = ~PIO_PER_P19;
- PIOD->PIO_ABCDSR[1] = PIO_PER_P18;
- PIOD->PIO_ABCDSR[1] = PIO_PER_P19;
-
- // set uart mode
- UART4->UART_MR = UART_MR_BRSRCCK_PERIPH_CLK | UART_MR_CHMODE_NORMAL;
-
- // set uart clock
- UART4->UART_BRGR = 1; // is selected clock / this*16
-
- // turn tx and rx on on the uart4 module
- UART4->UART_CR = UART_CR_TXEN | UART_CR_RXEN;
-
- while (1) {
- while(!(UART4->UART_SR & UART_SR_TXRDY)){
- PIOD->PIO_CODR = PIO_PER_P13;
- }
- PIOD->PIO_SODR = PIO_PER_P13;
- UART4->UART_THR = 85;
- }
-}
-```
-
-OK, enough for that wakeup, now I'm going to try to boot the USB CDC driver. This is something I'm more stoked about, and the last key component to letting me know that these chips are going to generally work.
-
-### USB CDC
-
-So, USB is a protocol, UART over USB is what the USB CDC lets you do. This is reductionist - and this also takes up some chunk of processor time, as far as I know - however, the chip has a USB peripheral, so I imagine most of the work is offloaded there. I would be tangentially interested in integrating a USB->Serial chip to compare processor overhead for the USB CDC implementation, but what am I trying to do here? Not that.
-
-I couldn't get this running, not sure if that was about my clock, or what - but after one day lost, I give up. I'm going to build a USB -> UART RS485 Bridge (I also need a power injector, so this is all good) and go forwards with port testing and setup.
-
-## Port Abstractions
-
-Pins are on Ports, UARTS are on Ports, everything is confusing and ugly if we just write C and bang on registers.
-
-```C
-
-#ifndef PIN_H_
-#define PIN_H_
-
-#include <stdlib.h>
-#include <stdint.h>
-#include <stddef.h>
-#include <stdbool.h>
-#include "ASF/sam/utils/cmsis/sams70/include/sams70n20.h"
-
-typedef struct{
- Pio *port;
- uint32_t pin_bm;
-}pin_t;
-
-pin_t pin_new(Pio *port, uint32_t pin_bitmask);
-
-#endif /* PIN_H_ */
-```
-
-and
-
-```C
-#include "pin.h"
-#include <asf.h>
-
-pin_t pin_new(Pio *port, uint32_t pin_bitmask){
- pin_t pin;
-
- pin.port = port;
- pin.pin_bm = pin_bitmask;
-
- return pin;
-}
-
-void pin_output(pin_t pin){
-}
-```
-
-to begin abstracting pins - just a struct
-
-Here we are with a basic UART Sketch - lots to abstract
-
-```C
-/**
- * \file
- *
- * \brief Empty user application template
- *
- */
-
-/**
- * \mainpage User Application template doxygen documentation
- *
- * \par Empty user application template
- *
- * Bare minimum empty user application template
- *
- * \par Content
- *
- * -# Include the ASF header files (through asf.h)
- * -# "Insert system clock initialization code here" comment
- * -# Minimal main function that starts with a call to board_init()
- * -# "Insert application code here" comment
- *
- */
-
-/*
- * Include header files for all drivers that have been imported from
- * Atmel Software Framework (ASF).
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#include <asf.h>
-#include "pin.h"
-
-pin_t stlb;
-pin_t stlr;
-pin_t button;
-
-pin_t p3lr;
-
-int main (void)
-{
- /* Insert system clock initialization code here (sysclk_init()). */
-
- board_init();
- sysclk_init();
-
- PMC->PMC_PCER0 = 1 << ID_PIOA;
- PMC->PMC_PCER0 = 1 << ID_PIOD;
-
- p3lr = pin_new(PIOD, PIO_PER_P10);
- pin_output(p3lr);
-
- stlb = pin_new(PIOA, PIO_PER_P1);
- pin_output(stlb);
-
- stlr = pin_new(PIOD, PIO_PER_P11);
- pin_output(stlr);
-
- button = pin_new(PIOA, PIO_PER_P15);
- pin_input(button);
-
- PMC->PMC_PCER1 = 1 << 14; // UART4 go clock go
-
- PIOD->PIO_PDR = PIO_PER_P18;
- PIOD->PIO_PDR = PIO_PER_P19;
-
- PIOD->PIO_ABCDSR[0] = ~PIO_PER_P18;
- PIOD->PIO_ABCDSR[0] = ~PIO_PER_P19;
- PIOD->PIO_ABCDSR[1] = PIO_PER_P18;
- PIOD->PIO_ABCDSR[1] = PIO_PER_P19;
-
- UART4->UART_MR = UART_MR_BRSRCCK_PERIPH_CLK | UART_MR_CHMODE_NORMAL;
- UART4->UART_BRGR = 32; // clock / this value * 16
- UART4->UART_CR = UART_CR_TXEN | UART_CR_RXEN;
-
- while(1){
- if(pin_get_state(button)){ // hi, button is not pressed
- pin_clear(stlb);
- pin_set(stlr);
- while(!(UART4->UART_SR & UART_SR_TXRDY)){ // wait for ready
- pin_clear(p3lr);
- }
- pin_set(p3lr);
- UART4->UART_THR = 85;
- } else {
- pin_set(stlb);
- pin_clear(stlr);
- pin_set(p3lr);
- }
- }
-}
-```
-
-OK, I finally got all ports to write to their TX lines. This after some confusing bitwise or-ing of registers.
-
-I'm going to check that all of the lights are on OK pins, and then call this, do the updates and get the big batch of boards out to fab.
-
-
-## Incremental
-
-order
- - 1k 0805
- - diff. chips
- - astams
- - or, draw up a BOM and order for 30 !
- - erase jumper
- - proper filtering / impedence on vddpll and vddoutmic
\ No newline at end of file
diff --git a/circuit/atsams70n-switch/atsams70n-switch-bom.html b/circuit/atsams70n-switch/atsams70n-switch-bom.html
new file mode 100644
index 0000000000000000000000000000000000000000..29abe45a1769af543f31c17be67623ef0f2349e0
--- /dev/null
+++ b/circuit/atsams70n-switch/atsams70n-switch-bom.html
@@ -0,0 +1,81 @@
+<b>Partlist exported from D:/Dropbox (Personal)/CBA/projects/tinynets/circuit/atsams70n-switch/atsams70n-switch.sch at 11/28/2017 10:52 PM</b>
+<p>
+<table>
+<tr><td><b>Part</b></td><td><b>Value</b></td><td><b>Device</b></td><td><b>Package</b></td><td><b>Description</b></td><td><b>MF</b></td><td><b>MPN</b></td><td><b>OC_FARNELL</b></td><td><b>OC_NEWARK</b></td><td><b>PACKAGE</b></td><td><b>SPICEMODEL</b></td><td><b>SPICEPREFIX</b></td><td><b>TYPE</b></td><td><b>VOLTAGE</b></td></tr>
+<tr><td>C1</td><td>22uF</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C2</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C3</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C4</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C5</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C6</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C7</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C8</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C9</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C10</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C11</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C12</td><td>0.1uF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C13</td><td>22pF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C14</td><td>22pF</td><td>CC0603</td><td>C0603</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C15</td><td>22uF 12v</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C16</td><td>10pF</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C17</td><td>4.7uF</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C18</td><td>4.7uF</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C19</td><td>22uF 12v</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C20</td><td>0.47uF</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C21</td><td>0.47uF</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C22</td><td>0.47uF</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C23</td><td>0.47uF</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C24</td><td>22uF 12v</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C25</td><td>22uF 12v</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C26</td><td>22uF 12v</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C27</td><td>22uF 12v</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C28</td><td>22uF 12v</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C29</td><td>22uF 12v</td><td>C</td><td>C0805</td><td>CAPACITOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>C</td><td></td><td></td></tr>
+<tr><td>C30</td><td>47uF</td><td>CAP1210</td><td>1210</td><td>Capacitor</td><td></td><td></td><td></td><td></td><td>1210</td><td></td><td></td><td></td><td></td></tr>
+<tr><td>C31</td><td>47uF</td><td>CAP1210</td><td>1210</td><td>Capacitor</td><td></td><td></td><td></td><td></td><td>1210</td><td></td><td></td><td></td><td></td></tr>
+<tr><td>D1</td><td>LEDRGBNEW</td><td>LEDRGBNEW</td><td>P-LCC-4</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>D2</td><td>LEDRGBNEW</td><td>LEDRGBNEW</td><td>P-LCC-4</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>D3</td><td>LEDRGBNEW</td><td>LEDRGBNEW</td><td>P-LCC-4</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>D4</td><td>LEDRGBNEW</td><td>LEDRGBNEW</td><td>P-LCC-4</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>D5</td><td>LEDRGBNEW</td><td>LEDRGBNEW</td><td>P-LCC-4</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>J1</td><td></td><td>CONN_04X2SHROUDED</td><td>2X4-SHROUDED</td><td>Multi connection point. Often used as Generic Header-pin footprint for 0.1 inch spaced/style header connections</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>J2</td><td></td><td>CONN_04X2SHROUDED</td><td>2X4-SHROUDED</td><td>Multi connection point. Often used as Generic Header-pin footprint for 0.1 inch spaced/style header connections</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>J3</td><td></td><td>CONN_04X2SHROUDED</td><td>2X4-SHROUDED</td><td>Multi connection point. Often used as Generic Header-pin footprint for 0.1 inch spaced/style header connections</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>J4</td><td></td><td>CONN_04X2SHROUDED</td><td>2X4-SHROUDED</td><td>Multi connection point. Often used as Generic Header-pin footprint for 0.1 inch spaced/style header connections</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>J5</td><td>CONN_20X2NOSILK</td><td>CONN_20X2NOSILK</td><td>2X20_NOSILK</td><td>Multi connection point. Often used as Generic Header-pin footprint for 0.1 inch spaced/style header connections</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>L1</td><td>10uH</td><td>L</td><td>L1812</td><td>INDUCTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>L</td><td></td><td></td></tr>
+<tr><td>L2</td><td>10uH</td><td>L</td><td>L1812</td><td>INDUCTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>L</td><td></td><td></td></tr>
+<tr><td>Q1</td><td>20MHz</td><td>CRYSTALCTS406</td><td>CTS406</td><td>CRYSTAL</td><td></td><td></td><td>unknown</td><td>unknown</td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>R1</td><td>1k</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R2</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R3</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R4</td><td>2R2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R5</td><td>2R2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R6</td><td>5k62</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R7</td><td>1k</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R8</td><td>1k</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R9</td><td>1k</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R10</td><td>1k</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R11</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R12</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R13</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R14</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R15</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R16</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R17</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R18</td><td>2k2</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R19</td><td>10K</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>R20</td><td>10K</td><td>R</td><td>R0805</td><td>RESISTOR, European symbol</td><td></td><td></td><td></td><td></td><td></td><td>NONE</td><td>R</td><td></td><td></td></tr>
+<tr><td>S1</td><td></td><td>6MM_SWITCH6MM_SWITCH</td><td>6MM_SWITCH</td><td>OMRON SWITCH</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>S2</td><td></td><td>6MM_SWITCH6MM_SWITCH</td><td>6MM_SWITCH</td><td>OMRON SWITCH</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>TP1</td><td>TC2050-NL</td><td>TC2050-NL</td><td>TC2050-MCP</td><td>TAG-CONNECT ISP ConnectorManufacturer: Tag-Connect</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>U$3</td><td>SOLDER_JUMPER</td><td>SOLDER_JUMPER</td><td>SJFAB</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>U$4</td><td>SOLDER_JUMPER</td><td>SOLDER_JUMPER</td><td>SJFAB</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>U1</td><td>REGULATOR_SOT223</td><td>REGULATOR_SOT223</td><td>SOT223</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>U2</td><td>ATSAMS70N-TQFP100</td><td>ATSAMS70N-TQFP100</td><td>TQFP100-14X14</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>U3</td><td>ISL3177E</td><td>ISL3177E</td><td>MSOP8</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>U4</td><td>ISL3177E</td><td>ISL3177E</td><td>MSOP8</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>U5</td><td>ISL3177E</td><td>ISL3177E</td><td>MSOP8</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>U6</td><td>ISL3177E</td><td>ISL3177E</td><td>MSOP8</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+<tr><td>X1</td><td>MICRO-USB_1/100</td><td>MICRO-USB_1/100</td><td>DX4R005HJ5_100</td><td>SMD micro USB connector as found in the fablab inventory.</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
+</table>
diff --git a/circuit/atsams70n-switch/atsams70n-switch.b#1 b/circuit/atsams70n-switch/atsams70n-switch.b#1
new file mode 100644
index 0000000000000000000000000000000000000000..e8bda71243a673beb9ea4410a4af82d1c5177712
--- /dev/null
+++ b/circuit/atsams70n-switch/atsams70n-switch.b#1
@@ -0,0 +1,3427 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="8.3.2">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="20" unitdist="mil" unit="mil" style="lines" multiple="1" display="yes" altdistance="5" altunitdist="mil" altunit="mil"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>
+<layer number="20" name="Dimension" color="24" fill="1" visible="yes" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="no" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="no" active="yes"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="no" active="yes"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="no" active="yes"/>
+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>
+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>
+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>
+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>
+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>
+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>
+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>
+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>
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+<wire x1="-0.9525" y1="-1.016" x2="-0.9525" y2="1.016" width="0.127" layer="21"/>
+<wire x1="-0.5715" y1="0" x2="-0.9525" y2="1.016" width="0.127" layer="21"/>
+<wire x1="-0.1905" y1="1.016" x2="-0.1905" y2="-1.016" width="0.127" layer="21"/>
+<wire x1="0.1905" y1="-1.016" x2="0.1905" y2="0" width="0.127" layer="21"/>
+<wire x1="0.1905" y1="0" x2="0.1905" y2="1.016" width="0.127" layer="21"/>
+<wire x1="0.1905" y1="0" x2="0.9525" y2="1.016" width="0.127" layer="21"/>
+<wire x1="0.1905" y1="0" x2="0.9525" y2="-1.016" width="0.127" layer="21"/>
+<wire x1="-0.5715" y1="0" x2="-0.1905" y2="1.016" width="0.127" layer="21"/>
+</package>
+<package name="CBA-SILK-LOGO">
+<circle x="0" y="0" radius="0.254" width="0.127" layer="21"/>
+<circle x="-0.762" y="0.762" radius="0.254" width="0.127" layer="21"/>
+<wire x1="-0.254" y1="1.016" x2="0.254" y2="1.016" width="0.127" layer="21"/>
+<wire x1="0.254" y1="1.016" x2="0.254" y2="0.508" width="0.127" layer="21"/>
+<wire x1="0.254" y1="0.508" x2="-0.254" y2="0.508" width="0.127" layer="21"/>
+<wire x1="-0.254" y1="0.508" x2="-0.254" y2="1.016" width="0.127" layer="21"/>
+<wire x1="-1.016" y1="0.254" x2="-0.508" y2="0.254" width="0.127" layer="21"/>
+<wire x1="-0.508" y1="0.254" x2="-0.508" y2="-0.254" width="0.127" layer="21"/>
+<wire x1="-0.508" y1="-0.254" x2="-1.016" y2="-0.254" width="0.127" layer="21"/>
+<wire x1="-1.016" y1="-0.254" x2="-1.016" y2="0.254" width="0.127" layer="21"/>
+<wire x1="0.508" y1="0.508" x2="1.016" y2="0.508" width="0.127" layer="21"/>
+<wire x1="1.016" y1="0.508" x2="1.016" y2="1.016" width="0.127" layer="21"/>
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+<wire x1="0.508" y1="0.254" x2="1.016" y2="0.254" width="0.127" layer="21"/>
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+<wire x1="1.016" y1="-0.508" x2="1.016" y2="-1.016" width="0.127" layer="21"/>
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+<wire x1="0.508" y1="-1.016" x2="0.508" y2="-0.508" width="0.127" layer="21"/>
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+<wire x1="-0.254" y1="-0.508" x2="-0.254" y2="-1.016" width="0.127" layer="21"/>
+<wire x1="-0.254" y1="-1.016" x2="0.254" y2="-1.016" width="0.127" layer="21"/>
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+<wire x1="-1.016" y1="-1.016" x2="-0.508" y2="-1.016" width="0.127" layer="21"/>
+<wire x1="-0.508" y1="-1.016" x2="-0.508" y2="-0.508" width="0.127" layer="21"/>
+</package>
+<package name="SJFAB">
+<wire x1="1.016" y1="0" x2="1.524" y2="0" width="0.1524" layer="51"/>
+<wire x1="-1.016" y1="0" x2="-1.524" y2="0" width="0.1524" layer="51"/>
+<wire x1="-0.254" y1="-0.127" x2="-0.254" y2="0.127" width="1.27" layer="51" curve="-180" cap="flat"/>
+<wire x1="0.254" y1="0.127" x2="0.254" y2="-0.127" width="1.27" layer="51" curve="-180" cap="flat"/>
+<smd name="1" x="-0.7874" y="0" dx="1.1176" dy="1.6002" layer="1"/>
+<smd name="2" x="0.7874" y="0" dx="1.1176" dy="1.6002" layer="1"/>
+<text x="-1.651" y="1.143" size="1.27" layer="25" ratio="10">>NAME</text>
+<text x="0.4001" y="0" size="0.02" layer="27">>VALUE</text>
+</package>
+</packages>
+</library>
+<library name="eagle-ltspice" urn="urn:adsk.eagle:library:217">
+<description>Default symbols for import LTspice schematics<p>
+2012-10-29 alf@cadsoft.de<br></description>
+<packages>
+<package name="C0603" urn="urn:adsk.eagle:footprint:13198/1" library_version="1">
+<description><b>CAPACITOR</b></description>
+<wire x1="-1.473" y1="0.983" x2="1.473" y2="0.983" width="0.0508" layer="39"/>
+<wire x1="1.473" y1="0.983" x2="1.473" y2="-0.983" width="0.0508" layer="39"/>
+<wire x1="1.473" y1="-0.983" x2="-1.473" y2="-0.983" width="0.0508" layer="39"/>
+<wire x1="-1.473" y1="-0.983" x2="-1.473" y2="0.983" width="0.0508" layer="39"/>
+<wire x1="-0.356" y1="0.432" x2="0.356" y2="0.432" width="0.1016" layer="51"/>
+<wire x1="-0.356" y1="-0.419" x2="0.356" y2="-0.419" width="0.1016" layer="51"/>
+<rectangle x1="-0.8382" y1="-0.4699" x2="-0.3381" y2="0.4801" layer="51"/>
+<rectangle x1="0.3302" y1="-0.4699" x2="0.8303" y2="0.4801" layer="51"/>
+<rectangle x1="-0.1999" y1="-0.3" x2="0.1999" y2="0.3" layer="35"/>
+<smd name="1" x="-0.85" y="0" dx="1.1" dy="1" layer="1"/>
+<smd name="2" x="0.85" y="0" dx="1.1" dy="1" layer="1"/>
+<text x="-0.635" y="0.635" size="1.27" layer="25">>NAME</text>
+<text x="-0.635" y="-1.905" size="1.27" layer="27">>VALUE</text>
+</package>
+<package name="C0805" urn="urn:adsk.eagle:footprint:13199/1" library_version="1">
+<description><b>CAPACITOR</b><p></description>
+<wire x1="-1.973" y1="0.983" x2="1.973" y2="0.983" width="0.0508" layer="39"/>
+<wire x1="1.973" y1="-0.983" x2="-1.973" y2="-0.983" width="0.0508" layer="39"/>
+<wire x1="-1.973" y1="-0.983" x2="-1.973" y2="0.983" width="0.0508" layer="39"/>
+<wire x1="-0.381" y1="0.66" x2="0.381" y2="0.66" width="0.1016" layer="51"/>
+<wire x1="-0.356" y1="-0.66" x2="0.381" y2="-0.66" width="0.1016" layer="51"/>
+<wire x1="1.973" y1="0.983" x2="1.973" y2="-0.983" width="0.0508" layer="39"/>
+<rectangle x1="-1.0922" y1="-0.7239" x2="-0.3421" y2="0.7262" layer="51"/>
+<rectangle x1="0.3556" y1="-0.7239" x2="1.1057" y2="0.7262" layer="51"/>
+<rectangle x1="-0.1001" y1="-0.4001" x2="0.1001" y2="0.4001" layer="35"/>
+<smd name="1" x="-0.95" y="0" dx="1.3" dy="1.5" layer="1"/>
+<smd name="2" x="0.95" y="0" dx="1.3" dy="1.5" layer="1"/>
+<text x="-1.27" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-1.27" y="-2.54" size="1.27" layer="27">>VALUE</text>
+</package>
+<package name="R0805" urn="urn:adsk.eagle:footprint:13236/1" library_version="1">
+<description><b>RESISTOR</b><p></description>
+<wire x1="-0.41" y1="0.635" x2="0.41" y2="0.635" width="0.1524" layer="51"/>
+<wire x1="-0.41" y1="-0.635" x2="0.41" y2="-0.635" width="0.1524" layer="51"/>
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+<wire x1="1.973" y1="-0.983" x2="-1.973" y2="-0.983" width="0.0508" layer="39"/>
+<wire x1="-1.973" y1="-0.983" x2="-1.973" y2="0.983" width="0.0508" layer="39"/>
+<rectangle x1="0.4064" y1="-0.6985" x2="1.0564" y2="0.7015" layer="51"/>
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+<smd name="2" x="0.95" y="0" dx="1.3" dy="1.5" layer="1"/>
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+<text x="-0.635" y="-2.54" size="1.27" layer="27">>VALUE</text>
+</package>
+<package name="L1812" urn="urn:adsk.eagle:footprint:13218/1" library_version="1">
+<description><b>INDUCTOR</b><p>
+chip</description>
+<wire x1="-1.4732" y1="1.6002" x2="1.4732" y2="1.6002" width="0.1016" layer="51"/>
+<wire x1="-1.4478" y1="-1.6002" x2="1.4732" y2="-1.6002" width="0.1016" layer="51"/>
+<rectangle x1="-2.3876" y1="-1.651" x2="-1.4376" y2="1.649" layer="51"/>
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+<smd name="1" x="-1.95" y="0" dx="1.9" dy="3.4" layer="1"/>
+<smd name="2" x="1.95" y="0" dx="1.9" dy="3.4" layer="1"/>
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+<text x="-1.905" y="-3.175" size="1.27" layer="27">>VALUE</text>
+</package>
+</packages>
+<packages3d>
+<package3d name="C0805" urn="urn:adsk.eagle:package:13265/1" type="box" library_version="1">
+<description>CAPACITOR</description>
+</package3d>
+<package3d name="R0805" urn="urn:adsk.eagle:package:13300/1" type="box" library_version="1">
+<description>RESISTOR</description>
+</package3d>
+<package3d name="L1812" urn="urn:adsk.eagle:package:13290/1" type="box" library_version="1">
+<description>INDUCTOR
+chip</description>
+</package3d>
+<package3d name="C0603" urn="urn:adsk.eagle:package:13262/1" type="box" library_version="1">
+<description>CAPACITOR</description>
+</package3d>
+</packages3d>
+</library>
+<library name="SparkFun-Connectors">
+<description><h3>SparkFun Connectors</h3>
+This library contains electrically-functional connectors.
+<br>
+<br>
+We've spent an enormous amount of time creating and checking these footprints and parts, but it is <b> the end user's responsibility</b> to ensure correctness and suitablity for a given componet or application.
+<br>
+<br>If you enjoy using this library, please buy one of our products at <a href=" www.sparkfun.com">SparkFun.com</a>.
+<br>
+<br>
+<b>Licensing:</b> Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/
+<br>
+<br>
+You are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>
+<packages>
+<package name="2X20_NOSILK">
+<description><h3>Plated Through Hole - 2x20 No Silk Outline</h3>
+<p>Specifications:
+<ul><li>Pin count:40</li>
+<li>Pin pitch:0.1"</li>
+</ul></p>
+<p>Example device(s):
+<ul><li>CONN_20x2</li>
+</ul></p></description>
+<pad name="1" x="0" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="2" x="0" y="2.54" drill="1.016" diameter="1.8796"/>
+<pad name="3" x="2.54" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="4" x="2.54" y="2.54" drill="1.016" diameter="1.8796"/>
+<pad name="5" x="5.08" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="6" x="5.08" y="2.54" drill="1.016" diameter="1.8796"/>
+<pad name="7" x="7.62" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="8" x="7.62" y="2.54" drill="1.016" diameter="1.8796"/>
+<pad name="9" x="10.16" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="10" x="10.16" y="2.54" drill="1.016" diameter="1.8796"/>
+<rectangle x1="-0.254" y1="-0.254" x2="0.254" y2="0.254" layer="51" rot="R90"/>
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+<rectangle x1="7.366" y1="2.286" x2="7.874" y2="2.794" layer="51" rot="R90"/>
+<pad name="11" x="12.7" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="12" x="12.7" y="2.54" drill="1.016" diameter="1.8796"/>
+<pad name="13" x="15.24" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="14" x="15.24" y="2.54" drill="1.016" diameter="1.8796"/>
+<pad name="15" x="17.78" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="16" x="17.78" y="2.54" drill="1.016" diameter="1.8796"/>
+<pad name="17" x="20.32" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="18" x="20.32" y="2.54" drill="1.016" diameter="1.8796"/>
+<pad name="19" x="22.86" y="0" drill="1.016" diameter="1.8796"/>
+<pad name="20" x="22.86" y="2.54" drill="1.016" diameter="1.8796"/>
+<rectangle x1="12.446" y1="-0.254" x2="12.954" y2="0.254" layer="51" rot="R90"/>
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+<pad name="21" x="25.4" y="0" drill="1.016" diameter="1.8796"/>
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+<rectangle x1="40.386" y1="-0.254" x2="40.894" y2="0.254" layer="51" rot="R90"/>
+<rectangle x1="42.926" y1="-0.254" x2="43.434" y2="0.254" layer="51" rot="R90"/>
+<rectangle x1="45.466" y1="-0.254" x2="45.974" y2="0.254" layer="51" rot="R90"/>
+<rectangle x1="48.006" y1="-0.254" x2="48.514" y2="0.254" layer="51" rot="R90"/>
+<wire x1="0.635" y1="-1.27" x2="-0.635" y2="-1.27" width="0.2032" layer="51"/>
+<wire x1="-0.635" y1="-1.27" x2="0.635" y2="-1.27" width="0.2032" layer="52"/>
+<text x="-0.635" y="4.064" size="0.6096" layer="25" font="vector" ratio="20">>NAME</text>
+<text x="-0.635" y="-2.413" size="0.6096" layer="27" font="vector" ratio="20">>VALUE</text>
+</package>
+</packages>
+</library>
+<library name="tag-connect-2050">
+<packages>
+<package name="TC2050-MCP">
+<description><B>TAG-CONNECT ISP Connector</B><BR><BR><I>Manufacturer:</I> <a href="www.tag-connect.com">Tag-Connect</a><BR>
+<BR>Cable for easy In-Circuit PCB Programming. Designed for Standard JTAG 10 Pin, suitable for many others.<BR>
+<BR>Footprint for TC2050 NL <BR>
+
+<TABLE cellspacing=0 cellpadding=0 border=0>
+<TR><TD width=20></TD><TD>
+<TABLE cellspacing=0 cellpadding=1 border=1>
+<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR>
+<TR><TD align=center>1</TD><TD>VTREF</TD></TR>
+<TR><TD align=center>2</TD><TD>nTRST</TD></TR>
+<TR><TD align=center>3</TD><TD>TDI</TD></TR>
+<TR><TD align=center>4</TD><TD>TMS</TD></TR>
+<TR><TD align=center>5</TD><TD>TCK</TD></TR>
+<TR><TD align=center>6</TD><TD>RTCK</TD></TR>
+<TR><TD align=center>7</TD><TD>TDO</TD></TR>
+<TR><TD align=center>8</TD><TD>RESET</TD></TR>
+<TR><TD align=center>9</TD><TD>GND</TD></TR>
+<TR><TD align=center>10</TD><TD>NC</TD></TR>
+</TABLE>
+</TD></TR></TABLE><BR><BR>
+©2009 ROFA.cz
+Modified 7/2011 by Tim McCarthy-Smith
+VIDA Products INC</description>
+<wire x1="0" y1="-2.54" x2="7.62" y2="-2.54" width="0.127" layer="21"/>
+<smd name="10" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<smd name="9" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<smd name="8" x="3.81" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<smd name="3" x="3.81" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<smd name="2" x="2.54" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<smd name="1" x="1.27" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<smd name="7" x="5.08" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<smd name="6" x="6.35" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<smd name="4" x="5.08" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<smd name="5" x="6.35" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/>
+<text x="-0.635" y="1.27" size="1.27" layer="25">>name</text>
+<hole x="0" y="0" drill="1"/>
+<hole x="7.62" y="-1.016" drill="1"/>
+<hole x="7.62" y="1.016" drill="1"/>
+<hole x="0" y="2.54" drill="2.3749"/>
+<hole x="0" y="-2.54" drill="2.3749"/>
+<hole x="5.715" y="2.54" drill="2.3749"/>
+<hole x="5.715" y="-2.54" drill="2.3749"/>
+</package>
+</packages>
+</library>
+<library name="borkedlabs-passives">
+<packages>
+<package name="1210">
+<wire x1="-1.6" y1="1.3" x2="1.6" y2="1.3" width="0.127" layer="51"/>
+<wire x1="1.6" y1="1.3" x2="1.6" y2="-1.3" width="0.127" layer="51"/>
+<wire x1="1.6" y1="-1.3" x2="-1.6" y2="-1.3" width="0.127" layer="51"/>
+<wire x1="-1.6" y1="-1.3" x2="-1.6" y2="1.3" width="0.127" layer="51"/>
+<wire x1="-1.6" y1="1.3" x2="1.6" y2="1.3" width="0.2032" layer="21"/>
+<wire x1="-1.6" y1="-1.3" x2="1.6" y2="-1.3" width="0.2032" layer="21"/>
+<smd name="1" x="-1.6" y="0" dx="1.2" dy="2" layer="1"/>
+<smd name="2" x="1.6" y="0" dx="1.2" dy="2" layer="1"/>
+<text x="-2.07" y="1.77" size="1.016" layer="25">>NAME</text>
+<text x="-2.17" y="-3.24" size="1.016" layer="27">>VALUE</text>
+</package>
+</packages>
+</library>
+</libraries>
+<attributes>
+</attributes>
+<variantdefs>
+</variantdefs>
+<classes>
+<class number="0" name="default" width="0" drill="0">
+</class>
+</classes>
+<designrules name="default *">
+<description language="de"><b>EAGLE Design Rules</b>
+<p>
+Die Standard-Design-Rules sind so gewählt, dass sie für
+die meisten Anwendungen passen. Sollte ihre Platine
+besondere Anforderungen haben, treffen Sie die erforderlichen
+Einstellungen hier und speichern die Design Rules unter
+einem neuen Namen ab.</description>
+<description language="en"><b>EAGLE Design Rules</b>
+<p>
+The default Design Rules have been set to cover
+a wide range of applications. Your particular design
+may have different requirements, so please make the
+necessary adjustments and save your customized
+design rules under a new name.</description>
+<param name="layerSetup" value="(1*16)"/>
+<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/>
+<param name="mtIsolate" value="1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
+<param name="mdWireWire" value="6mil"/>
+<param name="mdWirePad" value="6mil"/>
+<param name="mdWireVia" value="6mil"/>
+<param name="mdPadPad" value="6mil"/>
+<param name="mdPadVia" value="6mil"/>
+<param name="mdViaVia" value="6mil"/>
+<param name="mdSmdPad" value="6mil"/>
+<param name="mdSmdVia" value="6mil"/>
+<param name="mdSmdSmd" value="6mil"/>
+<param name="mdViaViaSameLayer" value="6mil"/>
+<param name="mnLayersViaInSmd" value="2"/>
+<param name="mdCopperDimension" value="6mil"/>
+<param name="mdDrill" value="6mil"/>
+<param name="mdSmdStop" value="0mil"/>
+<param name="msWidth" value="6mil"/>
+<param name="msDrill" value="0.35mm"/>
+<param name="msMicroVia" value="9.99mm"/>
+<param name="msBlindViaRatio" value="0.5"/>
+<param name="rvPadTop" value="0.25"/>
+<param name="rvPadInner" value="0.25"/>
+<param name="rvPadBottom" value="0.25"/>
+<param name="rvViaOuter" value="0.25"/>
+<param name="rvViaInner" value="0.25"/>
+<param name="rvMicroViaOuter" value="0.25"/>
+<param name="rvMicroViaInner" value="0.25"/>
+<param name="rlMinPadTop" value="10mil"/>
+<param name="rlMaxPadTop" value="20mil"/>
+<param name="rlMinPadInner" value="10mil"/>
+<param name="rlMaxPadInner" value="20mil"/>
+<param name="rlMinPadBottom" value="10mil"/>
+<param name="rlMaxPadBottom" value="20mil"/>
+<param name="rlMinViaOuter" value="8mil"/>
+<param name="rlMaxViaOuter" value="20mil"/>
+<param name="rlMinViaInner" value="8mil"/>
+<param name="rlMaxViaInner" value="20mil"/>
+<param name="rlMinMicroViaOuter" value="4mil"/>
+<param name="rlMaxMicroViaOuter" value="20mil"/>
+<param name="rlMinMicroViaInner" value="4mil"/>
+<param name="rlMaxMicroViaInner" value="20mil"/>
+<param name="psTop" value="-1"/>
+<param name="psBottom" value="-1"/>
+<param name="psFirst" value="-1"/>
+<param name="psElongationLong" value="100"/>
+<param name="psElongationOffset" value="100"/>
+<param name="mvStopFrame" value="1"/>
+<param name="mvCreamFrame" value="0"/>
+<param name="mlMinStopFrame" value="4mil"/>
+<param name="mlMaxStopFrame" value="4mil"/>
+<param name="mlMinCreamFrame" value="0mil"/>
+<param name="mlMaxCreamFrame" value="0mil"/>
+<param name="mlViaStopLimit" value="27mil"/>
+<param name="srRoundness" value="0"/>
+<param name="srMinRoundness" value="0mil"/>
+<param name="srMaxRoundness" value="0mil"/>
+<param name="slThermalIsolate" value="6mil"/>
+<param name="slThermalsForVias" value="0"/>
+<param name="dpMaxLengthDifference" value="10mm"/>
+<param name="dpGapFactor" value="2.5"/>
+<param name="checkGrid" value="0"/>
+<param name="checkAngle" value="0"/>
+<param name="checkFont" value="1"/>
+<param name="checkRestrict" value="1"/>
+<param name="useDiameter" value="13"/>
+<param name="maxErrors" value="50"/>
+</designrules>
+<autorouter>
+<pass name="Default">
+<param name="RoutingGrid" value="12.5mil"/>
+<param name="AutoGrid" value="1"/>
+<param name="Efforts" value="0"/>
+<param name="TopRouterVariant" value="1"/>
+<param name="tpViaShape" value="round"/>
+<param name="PrefDir.1" value="-"/>
+<param name="PrefDir.2" value="0"/>
+<param name="PrefDir.3" value="0"/>
+<param name="PrefDir.4" value="0"/>
+<param name="PrefDir.5" value="0"/>
+<param name="PrefDir.6" value="0"/>
+<param name="PrefDir.7" value="0"/>
+<param name="PrefDir.8" value="0"/>
+<param name="PrefDir.9" value="0"/>
+<param name="PrefDir.10" value="0"/>
+<param name="PrefDir.11" value="0"/>
+<param name="PrefDir.12" value="0"/>
+<param name="PrefDir.13" value="0"/>
+<param name="PrefDir.14" value="0"/>
+<param name="PrefDir.15" value="0"/>
+<param name="PrefDir.16" value="|"/>
+<param name="cfVia" value="8"/>
+<param name="cfNonPref" value="5"/>
+<param name="cfChangeDir" value="2"/>
+<param name="cfOrthStep" value="2"/>
+<param name="cfDiagStep" value="3"/>
+<param name="cfExtdStep" value="0"/>
+<param name="cfBonusStep" value="1"/>
+<param name="cfMalusStep" value="1"/>
+<param name="cfPadImpact" value="4"/>
+<param name="cfSmdImpact" value="4"/>
+<param name="cfBusImpact" value="0"/>
+<param name="cfHugging" value="3"/>
+<param name="cfAvoid" value="4"/>
+<param name="cfPolygon" value="10"/>
+<param name="cfBase.1" value="0"/>
+<param name="cfBase.2" value="1"/>
+<param name="cfBase.3" value="1"/>
+<param name="cfBase.4" value="1"/>
+<param name="cfBase.5" value="1"/>
+<param name="cfBase.6" value="1"/>
+<param name="cfBase.7" value="1"/>
+<param name="cfBase.8" value="1"/>
+<param name="cfBase.9" value="1"/>
+<param name="cfBase.10" value="1"/>
+<param name="cfBase.11" value="1"/>
+<param name="cfBase.12" value="1"/>
+<param name="cfBase.13" value="1"/>
+<param name="cfBase.14" value="1"/>
+<param name="cfBase.15" value="1"/>
+<param name="cfBase.16" value="0"/>
+<param name="mnVias" value="20"/>
+<param name="mnSegments" value="9999"/>
+<param name="mnExtdSteps" value="9999"/>
+<param name="mnRipupLevel" value="10"/>
+<param name="mnRipupSteps" value="100"/>
+<param name="mnRipupTotal" value="100"/>
+</pass>
+<pass name="Follow-me" refer="Default" active="yes">
+</pass>
+<pass name="Busses" refer="Default" active="yes">
+<param name="cfNonPref" value="4"/>
+<param name="cfBusImpact" value="4"/>
+<param name="cfHugging" value="0"/>
+<param name="mnVias" value="0"/>
+</pass>
+<pass name="Route" refer="Default" active="yes">
+</pass>
+<pass name="Optimize1" refer="Default" active="yes">
+<param name="cfVia" value="99"/>
+<param name="cfExtdStep" value="10"/>
+<param name="cfHugging" value="1"/>
+<param name="mnExtdSteps" value="1"/>
+<param name="mnRipupLevel" value="0"/>
+</pass>
+<pass name="Optimize2" refer="Optimize1" active="yes">
+<param name="cfNonPref" value="0"/>
+<param name="cfChangeDir" value="6"/>
+<param name="cfExtdStep" value="0"/>
+<param name="cfBonusStep" value="2"/>
+<param name="cfMalusStep" value="2"/>
+<param name="cfPadImpact" value="2"/>
+<param name="cfSmdImpact" value="2"/>
+<param name="cfHugging" value="0"/>
+</pass>
+<pass name="Optimize3" refer="Optimize2" active="yes">
+<param name="cfChangeDir" value="8"/>
+<param name="cfPadImpact" value="0"/>
+<param name="cfSmdImpact" value="0"/>
+</pass>
+<pass name="Optimize4" refer="Optimize3" active="yes">
+<param name="cfChangeDir" value="25"/>
+</pass>
+</autorouter>
+<elements>
+<element name="Q1" library="crystal" library_urn="urn:adsk.eagle:library:204" package="CTS406" package3d_urn="urn:adsk.eagle:package:12089/1" value="20MHz" x="50.16655" y="43.7540125" rot="R60">
+<attribute name="MF" value="" x="50.16655" y="43.7540125" size="1.778" layer="27" rot="R60" display="off"/>
+<attribute name="MPN" value="" x="50.16655" y="43.7540125" size="1.778" layer="27" rot="R60" display="off"/>
+<attribute name="OC_FARNELL" value="unknown" x="50.16655" y="43.7540125" size="1.778" layer="27" rot="R60" display="off"/>
+<attribute name="OC_NEWARK" value="unknown" x="50.16655" y="43.7540125" size="1.778" layer="27" rot="R60" display="off"/>
+</element>
+<element name="S1" library="fab" package="6MM_SWITCH" value="" x="11.811" y="49.5554" rot="R90"/>
+<element name="D1" library="fab" package="P-LCC-4" value="LEDRGBNEW" x="60.833" y="31.369" rot="R90"/>
+<element name="X1" library="fab" package="DX4R005HJ5_100" value="MICRO-USB_1/100" x="60.833" y="37.592" rot="R90"/>
+<element name="U6" library="fab" package="MSOP8" value="ISL3177E" x="34.544" y="55.626" rot="R90"/>
+<element name="D5" library="fab" package="P-LCC-4" value="LEDRGBNEW" x="27.9908" y="55.372" rot="R180"/>
+<element name="U1" library="fab" package="SOT223" value="REGULATOR_SOT223" x="59.055" y="46.482"/>
+<element name="J4" library="fab" package="2X4-SHROUDED" value="" x="28.956" y="62.23" rot="R90"/>
+<element name="J5" library="SparkFun-Connectors" package="2X20_NOSILK" value="CONN_20X2NOSILK" x="19.431" y="15.24" rot="R90"/>
+<element name="C23" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="C0805" package3d_urn="urn:adsk.eagle:package:13265/1" value="0.47uF" x="38.548309375" y="55.806340625" rot="R90">
+<attribute name="SPICEMODEL" value="NONE" x="38.548309375" y="55.806340625" size="1.778" layer="27" rot="R90" display="off"/>
+<attribute name="SPICEPREFIX" value="C" x="38.548309375" y="55.806340625" size="1.778" layer="27" rot="R90" display="off"/>
+</element>
+<element name="R17" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="R0805" package3d_urn="urn:adsk.eagle:package:13300/1" value="2k2" x="24.13" y="56.769">
+<attribute name="SPICEMODEL" value="NONE" x="24.13" y="56.769" size="1.778" layer="27" display="off"/>
+<attribute name="SPICEPREFIX" value="R" x="24.13" y="56.769" size="1.778" layer="27" display="off"/>
+</element>
+<element name="R10" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="R0805" package3d_urn="urn:adsk.eagle:package:13300/1" value="1k" x="24.13" y="53.213">
+<attribute name="SPICEMODEL" value="NONE" x="24.13" y="53.213" size="1.778" layer="27" display="off"/>
+<attribute name="SPICEPREFIX" value="R" x="24.13" y="53.213" size="1.778" layer="27" display="off"/>
+</element>
+<element name="R18" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="R0805" package3d_urn="urn:adsk.eagle:package:13300/1" value="2k2" x="24.13" y="54.991">
+<attribute name="SPICEMODEL" value="NONE" x="24.13" y="54.991" size="1.778" layer="27" display="off"/>
+<attribute name="SPICEPREFIX" value="R" x="24.13" y="54.991" size="1.778" layer="27" display="off"/>
+</element>
+<element name="C28" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="C0805" package3d_urn="urn:adsk.eagle:package:13265/1" value="22uF 12v" x="40.827959375" y="58.87593125" rot="R180">
+<attribute name="SPICEMODEL" value="NONE" x="40.827959375" y="58.87593125" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="SPICEPREFIX" value="C" x="40.827959375" y="58.87593125" size="1.778" layer="27" rot="R180" display="off"/>
+</element>
+<element name="C15" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="C0805" package3d_urn="urn:adsk.eagle:package:13265/1" value="22uF 12v" x="62.5348" y="50.2158" rot="R270">
+<attribute name="SPICEMODEL" value="NONE" x="62.5348" y="50.2158" size="1.778" layer="27" rot="R270" display="off"/>
+<attribute name="SPICEPREFIX" value="C" x="62.5348" y="50.2158" size="1.778" layer="27" rot="R270" display="off"/>
+</element>
+<element name="C19" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="C0805" package3d_urn="urn:adsk.eagle:package:13265/1" value="22uF 12v" x="55.5752" y="50.165" rot="R90">
+<attribute name="SPICEMODEL" value="NONE" x="55.5752" y="50.165" size="1.778" layer="27" rot="R90" display="off"/>
+<attribute name="SPICEPREFIX" value="C" x="55.5752" y="50.165" size="1.778" layer="27" rot="R90" display="off"/>
+</element>
+<element name="C13" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="C0603" package3d_urn="urn:adsk.eagle:package:13262/1" value="22pF" x="52.5621375" y="47.885578125" rot="R240">
+<attribute name="SPICEMODEL" value="NONE" x="52.5621375" y="47.885578125" size="1.778" layer="27" rot="R240" display="off"/>
+<attribute name="SPICEPREFIX" value="C" x="52.5621375" y="47.885578125" size="1.778" layer="27" rot="R240" display="off"/>
+</element>
+<element name="C14" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="C0603" package3d_urn="urn:adsk.eagle:package:13262/1" value="22pF" x="52.918903125" y="41.923534375" rot="R330">
+<attribute name="SPICEMODEL" value="NONE" x="52.918903125" y="41.923534375" size="1.778" layer="27" rot="R330" display="off"/>
+<attribute name="SPICEPREFIX" value="C" x="52.918903125" y="41.923534375" size="1.778" layer="27" rot="R330" display="off"/>
+</element>
+<element name="U2" library="fab" package="TQFP100-14X14" value="ATSAMS70N-TQFP100" x="33.704959375" y="39.0262" rot="R180"/>
+<element name="R6" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="R0805" package3d_urn="urn:adsk.eagle:package:13300/1" value="5k62" x="44.44406875" y="47.44320625">
+<attribute name="SPICEMODEL" value="NONE" x="44.44406875" y="47.44320625" size="1.778" layer="27" display="off"/>
+<attribute name="SPICEPREFIX" value="R" x="44.44406875" y="47.44320625" size="1.778" layer="27" display="off"/>
+</element>
+<element name="C16" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="C0805" package3d_urn="urn:adsk.eagle:package:13265/1" value="10pF" x="44.44406875" y="49.23925625" rot="R180">
+<attribute name="SPICEMODEL" value="NONE" x="44.44406875" y="49.23925625" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="SPICEPREFIX" value="C" x="44.44406875" y="49.23925625" size="1.778" layer="27" rot="R180" display="off"/>
+</element>
+<element name="C11" library="eagle-ltspice" library_urn="urn:adsk.eagle:library:217" package="C0603" package3d_urn="urn:adsk.eagle:package:13262/1" value="0.1uF" x="44.840478125" y="37.7689625" rot="R180">
+<attribute name="SPICEMODEL" value="NONE" x="44.840478125" y="37.7689625" size="1.778" layer="27" rot="R180" display="off"/>
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+<wire x1="25.4152125" y1="36.1188" x2="25.415209375" y2="36.118796875" width="0.1524" layer="16"/>
+<wire x1="25.415209375" y1="36.118796875" x2="25.162696875" y2="36.118796875" width="0.1524" layer="16"/>
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+<wire x1="25.16269375" y1="36.1188" x2="25.0952" y2="36.1188" width="0.1524" layer="16"/>
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+<wire x1="22.382478125" y1="36.576" x2="24.638" y2="36.576" width="0.1524" layer="16"/>
+<wire x1="18.0594" y1="34.3916" x2="20.198078125" y2="34.3916" width="0.1524" layer="16"/>
+</signal>
+<signal name="MK-F0">
+<contactref element="J5" pad="33"/>
+</signal>
+<signal name="MK-F3">
+<contactref element="J5" pad="40"/>
+</signal>
+<signal name="N$41">
+<via x="42.672" y="14.732" extent="1-16" drill="3.2004"/>
+</signal>
+<signal name="N$42">
+<via x="42.672" y="63.754" extent="1-16" drill="3.2004"/>
+</signal>
+<signal name="N$43">
+<via x="11.684" y="14.732" extent="1-16" drill="3.2004"/>
+</signal>
+<signal name="N$44">
+<via x="11.684" y="63.754" extent="1-16" drill="3.2004"/>
+</signal>
+<signal name="MK-F4">
+<contactref element="J5" pad="30"/>
+<contactref element="U2" pad="31"/>
+<wire x1="25.954959375" y1="42.5262" x2="22.32074375" y2="42.5262" width="0.1524" layer="1"/>
+<wire x1="22.32074375" y1="42.5262" x2="21.59" y2="43.25694375" width="0.1524" layer="1"/>
+<wire x1="21.59" y1="46.482" x2="21.5392" y2="46.5328" width="0.1524" layer="1"/>
+<wire x1="21.59" y1="43.25694375" x2="21.59" y2="46.482" width="0.1524" layer="1"/>
+<via x="21.5392" y="46.5328" extent="1-16" drill="0.25"/>
+<wire x1="21.5392" y1="48.4632" x2="21.5392" y2="46.5328" width="0.1524" layer="16"/>
+<wire x1="16.891" y1="50.8" x2="18.161" y2="49.53" width="0.1524" layer="16"/>
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+<wire x1="18.161" y1="49.53" x2="21.05734375" y2="49.53" width="0.1524" layer="16"/>
+</signal>
+<signal name="MK-UTX3">
+<contactref element="U2" pad="23"/>
+<contactref element="J5" pad="8"/>
+<via x="14.9352" y="44.3992" extent="1-16" drill="0.3"/>
+<via x="14.9352" y="35.0012" extent="1-16" drill="0.3"/>
+<wire x1="27.40586875" y1="45.645715625" x2="27.57229375" y2="45.47929375" width="0.1524" layer="1"/>
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+<wire x1="14.5796" y1="35.74288125" x2="14.5796" y2="44.0436" width="0.1524" layer="16"/>
+<wire x1="14.5796" y1="44.0436" x2="14.9352" y2="44.3992" width="0.1524" layer="16"/>
+</signal>
+<signal name="MK-URX3-TWCK2">
+<contactref element="U2" pad="51"/>
+<contactref element="J5" pad="7"/>
+<wire x1="19.431" y1="22.86" x2="19.431" y2="23.622" width="0.1524" layer="1"/>
+<wire x1="20.701" y1="24.892" x2="20.701" y2="27.126575" width="0.1524" layer="1"/>
+<wire x1="20.701" y1="27.126575" x2="20.9042" y2="27.329775" width="0.1524" layer="1"/>
+<wire x1="20.9042" y1="27.329775" x2="20.9042" y2="27.94223125" width="0.1524" layer="1"/>
+<wire x1="22.4028" y1="29.44083125" x2="22.4028" y2="30.48074375" width="0.1524" layer="1"/>
+<wire x1="22.4028" y1="30.48074375" x2="22.60525625" y2="30.6832" width="0.1524" layer="1"/>
+<wire x1="23.36725625" y1="30.6832" x2="24.63725625" y2="31.9532" width="0.1524" layer="1"/>
+<wire x1="26.66925625" y1="31.9532" x2="27.139528125" y2="32.423471875" width="0.1524" layer="1"/>
+<wire x1="27.139528125" y1="32.423471875" x2="27.520528125" y2="32.423471875" width="0.1524" layer="1"/>
+<wire x1="27.520528125" y1="32.423471875" x2="27.686" y2="32.258" width="0.1524" layer="1"/>
+<wire x1="27.686" y1="32.258" x2="27.686" y2="31.295159375" width="0.1524" layer="1"/>
+<wire x1="27.686" y1="31.295159375" x2="27.704959375" y2="31.2762" width="0.1524" layer="1"/>
+<wire x1="19.431" y1="23.622" x2="20.701" y2="24.892" width="0.1524" layer="1"/>
+<wire x1="20.9042" y1="27.94223125" x2="22.4028" y2="29.44083125" width="0.1524" layer="1"/>
+<wire x1="22.60525625" y1="30.6832" x2="23.36725625" y2="30.6832" width="0.1524" layer="1"/>
+<wire x1="24.63725625" y1="31.9532" x2="26.66925625" y2="31.9532" width="0.1524" layer="1"/>
+</signal>
+<signal name="MK-TWD2">
+<contactref element="U2" pad="32"/>
+<contactref element="J5" pad="9"/>
+<wire x1="19.431" y1="25.4" x2="19.431" y2="26.28763125" width="0.1524" layer="1"/>
+<wire x1="20.5994" y1="27.45603125" x2="20.5994" y2="28.0684875" width="0.1524" layer="1"/>
+<wire x1="22.098" y1="29.5670875" x2="22.098" y2="30.607" width="0.1524" layer="1"/>
+<wire x1="22.098" y1="30.607" x2="22.479" y2="30.988" width="0.1524" layer="1"/>
+<wire x1="22.479" y1="30.988" x2="23.241" y2="30.988" width="0.1524" layer="1"/>
+<wire x1="23.241" y1="30.988" x2="24.511" y2="32.258" width="0.1524" layer="1"/>
+<wire x1="24.511" y1="32.258" x2="26.543" y2="32.258" width="0.1524" layer="1"/>
+<wire x1="26.543" y1="32.258" x2="29.083" y2="34.798" width="0.1524" layer="1"/>
+<wire x1="29.083" y1="34.798" x2="29.083" y2="41.402" width="0.1524" layer="1"/>
+<wire x1="29.083" y1="41.402" x2="28.45879375" y2="42.02620625" width="0.1524" layer="1"/>
+<wire x1="28.45879375" y1="42.02620625" x2="25.954965625" y2="42.02620625" width="0.1524" layer="1"/>
+<wire x1="25.954965625" y1="42.02620625" x2="25.954959375" y2="42.0262" width="0.1524" layer="1"/>
+<wire x1="19.431" y1="26.28763125" x2="20.5994" y2="27.45603125" width="0.1524" layer="1"/>
+<wire x1="20.5994" y1="28.0684875" x2="22.098" y2="29.5670875" width="0.1524" layer="1"/>
+</signal>
+<signal name="MK-PWM0H0">
+<contactref element="U2" pad="44"/>
+<contactref element="J5" pad="14"/>
+<wire x1="25.954959375" y1="36.0262" x2="24.5962" y2="36.0262" width="0.1524" layer="1"/>
+<wire x1="24.5962" y1="36.0262" x2="24.13" y2="35.56" width="0.1524" layer="1"/>
+<via x="24.13" y="35.56" extent="1-16" drill="0.25"/>
+<wire x1="24.13" y1="35.56" x2="22.4789625" y2="35.56" width="0.1524" layer="16"/>
+<wire x1="22.4789625" y1="35.56" x2="20.7029625" y2="33.784" width="0.1524" layer="16"/>
+<via x="20.7029625" y="33.784" extent="1-16" drill="0.25"/>
+<wire x1="20.0188" y1="31.92045625" x2="20.0188" y2="31.906" width="0.1524" layer="1"/>
+<wire x1="20.0188" y1="31.906" x2="19.8628" y2="31.75" width="0.1524" layer="1"/>
+<wire x1="20.7029625" y1="33.784" x2="20.7029625" y2="32.60461875" width="0.1524" layer="1"/>
+<wire x1="20.7029625" y1="32.60461875" x2="20.0188" y2="31.92045625" width="0.1524" layer="1"/>
+<wire x1="19.8628" y1="31.75" x2="18.161" y2="31.75" width="0.1524" layer="1"/>
+<wire x1="18.161" y1="31.75" x2="16.891" y2="30.48" width="0.1524" layer="1"/>
+</signal>
+<signal name="B1">
+<contactref element="S1" pad="4"/>
+<contactref element="S1" pad="3"/>
+<contactref element="R20" pad="1"/>
+<contactref element="U2" pad="33"/>
+<wire x1="12.7356" y1="44.892" x2="12.761" y2="43.434" width="0.1524" layer="1"/>
+<wire x1="14.097" y1="46.2534" x2="12.7356" y2="44.892" width="0.1524" layer="1"/>
+<wire x1="14.097" y1="52.8574" x2="14.097" y2="46.2534" width="0.2032" layer="1"/>
+<wire x1="12.761" y1="43.434" x2="13.662659375" y2="43.434" width="0.1524" layer="1"/>
+<wire x1="13.662659375" y1="43.434" x2="15.161259375" y2="41.9354" width="0.1524" layer="1"/>
+<via x="15.161259375" y="41.9354" extent="1-16" drill="0.25"/>
+<wire x1="15.161259375" y1="41.9354" x2="23.647209375" y2="41.9354" width="0.1524" layer="16"/>
+<wire x1="23.647209375" y1="41.9354" x2="24.032209375" y2="41.5504" width="0.1524" layer="16"/>
+<via x="24.032209375" y="41.5504" extent="1-16" drill="0.25"/>
+<wire x1="24.032209375" y1="41.5504" x2="25.930759375" y2="41.5504" width="0.1524" layer="1"/>
+<wire x1="25.930759375" y1="41.5504" x2="25.954959375" y2="41.5262" width="0.1524" layer="1"/>
+</signal>
+<signal name="TCK/SWCLK">
+<contactref element="U2" pad="63"/>
+<contactref element="TP1" pad="4"/>
+<wire x1="41.99168125" y1="24.02369375" x2="41.63530625" y2="24.02369375" width="0.1524" layer="1"/>
+<wire x1="41.63530625" y1="24.02369375" x2="40.767" y2="24.892" width="0.1524" layer="1"/>
+<wire x1="40.767" y1="24.892" x2="35.433" y2="24.892" width="0.1524" layer="1"/>
+<wire x1="35.433" y1="24.892" x2="33.401" y2="26.924" width="0.1524" layer="1"/>
+<wire x1="33.401" y1="26.924" x2="33.401" y2="28.194" width="0.1524" layer="1"/>
+<wire x1="33.401" y1="28.194" x2="33.528" y2="28.321" width="0.1524" layer="1"/>
+<wire x1="33.528" y1="30.099" x2="33.528" y2="28.321" width="0.1524" layer="1"/>
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+<wire x1="33.704959375" y1="30.275959375" x2="33.528" y2="30.099" width="0.1524" layer="1"/>
+</signal>
+<signal name="TMS/SWDIO">
+<contactref element="U2" pad="57"/>
+<contactref element="TP1" pad="2"/>
+<wire x1="41.99168125" y1="26.56369375" x2="41.93069375" y2="26.56369375" width="0.1524" layer="1"/>
+<wire x1="41.93069375" y1="26.56369375" x2="40.64" y2="25.273" width="0.1524" layer="1"/>
+<wire x1="40.64" y1="25.273" x2="35.8922" y2="25.273" width="0.1524" layer="1"/>
+<wire x1="35.8922" y1="25.273" x2="35.179" y2="25.9862" width="0.1524" layer="1"/>
+<via x="35.179" y="25.9862" extent="1-16" drill="0.25"/>
+<wire x1="35.179" y1="25.9862" x2="32.5608" y2="25.9862" width="0.1524" layer="16"/>
+<wire x1="32.5608" y1="25.9862" x2="30.226" y2="28.321" width="0.1524" layer="16"/>
+<via x="30.226" y="28.321" extent="1-16" drill="0.25"/>
+<wire x1="30.226" y1="29.337" x2="30.226" y2="28.321" width="0.1524" layer="1"/>
+<wire x1="30.704959375" y1="31.2762" x2="30.704959375" y2="29.815959375" width="0.1524" layer="1"/>
+<wire x1="30.704959375" y1="29.815959375" x2="30.226" y2="29.337" width="0.1524" layer="1"/>
+</signal>
+<signal name="N$6">
+<contactref element="U$4" pad="1"/>
+<contactref element="X1" pad="D-"/>
+<wire x1="59.233" y1="36.942" x2="57.29118125" y2="36.942" width="0.2032" layer="1"/>
+<wire x1="57.29118125" y1="36.942" x2="57.276590625" y2="36.956590625" width="0.2032" layer="1"/>
+<via x="57.276590625" y="36.956590625" extent="1-16" drill="0.25"/>
+<wire x1="57.276590625" y1="36.956590625" x2="52.450590625" y2="36.956590625" width="0.2032" layer="16"/>
+<wire x1="52.450590625" y1="36.956590625" x2="51.689" y2="36.195" width="0.2032" layer="16"/>
+<wire x1="51.689" y1="36.195" x2="50.8254" y2="36.195" width="0.2032" layer="16"/>
+</signal>
+<signal name="N$40">
+<contactref element="X1" pad="D+"/>
+<contactref element="U$3" pad="1"/>
+<wire x1="59.233" y1="37.592" x2="57.785" y2="37.592" width="0.2032" layer="1"/>
+<via x="57.785" y="37.592" extent="1-16" drill="0.25"/>
+<wire x1="57.785" y1="37.592" x2="52.324" y2="37.592" width="0.2032" layer="16"/>
+<wire x1="52.324" y1="37.592" x2="51.689" y2="38.227" width="0.2032" layer="16"/>
+<wire x1="51.689" y1="38.227" x2="50.8254" y2="38.227" width="0.2032" layer="16"/>
+</signal>
+</signals>
+</board>
+</drawing>
+<compatibility>
+<note version="6.3" minversion="6.2.2" severity="warning">
+Since Version 6.2.2 text objects can contain more than one line,
+which will not be processed correctly with this version.
+</note>
+<note version="8.2" severity="warning">
+Since Version 8.2, EAGLE supports online libraries. The ids
+of those online libraries will not be understood (or retained)
+with this version.
+</note>
+<note version="8.3" severity="warning">
+Since Version 8.3, EAGLE supports URNs for individual library
+assets (packages, symbols, and devices). The URNs of those assets
+will not be understood (or retained) with this version.
+</note>
+<note version="8.3" severity="warning">
+Since Version 8.3, EAGLE supports the association of 3D packages
+with devices in libraries, schematics, and board files. Those 3D
+packages will not be understood (or retained) with this version.
+</note>
+</compatibility>
+</eagle>
diff --git a/embedded/README.md b/embedded/README.md
index 848340d263dd55ad75be794fbca107c37eb2c615..5e8ad76316ecb2ad867eed49177bb38b2f9ac468 100644
--- a/embedded/README.md
+++ b/embedded/README.md
@@ -1,4 +1,3 @@
-
# Programming
It turns out this chip defaults to SWD, not JTAG. Should have read the datasheet more carefully. Also, I forgot to order the tag-connect for this number of pins...