From 63cbf13b5b35aebb00bcb7c79f3ace941eaaf381 Mon Sep 17 00:00:00 2001
From: Jake Read <jake.read@cba.mit.edu>
Date: Wed, 14 Oct 2020 15:45:53 -0400
Subject: [PATCH] here's a mystery
---
.../src/drivers/step_cl.cpp | 104 ++++++++++++++----
.../src/utils/FlashStorage.cpp | 45 +++++---
.../src/utils/FlashStorage.h | 2 +-
log/cl-step-control-log.md | 26 ++++-
4 files changed, 135 insertions(+), 42 deletions(-)
diff --git a/firmware/cl-step-controller/src/drivers/step_cl.cpp b/firmware/cl-step-controller/src/drivers/step_cl.cpp
index bea6221..873dcaa 100644
--- a/firmware/cl-step-controller/src/drivers/step_cl.cpp
+++ b/firmware/cl-step-controller/src/drivers/step_cl.cpp
@@ -47,9 +47,9 @@ void Step_CL::init(void){
//lut = flash_lut.read();
}
-#define BYTES_PER_PAGE 512
-#define FLOATS_PER_PAGE 128
-#define PAGES_PER_BLOCK 16 // for 8192 bytes / block
+// #define BYTES_PER_PAGE 512
+// #define FLOATS_PER_PAGE 128
+// #define PAGES_PER_BLOCK 16 // for 8192 bytes / block
#define LUT_SIZE 2048
//const float __attribute__((__aligned__(BYTES_PER_PAGE))) lut[LUT_SIZE] = {};
@@ -63,46 +63,104 @@ typedef struct {
float f[LUT_SIZE];
} flts;
+typedef struct {
+ float f[ENCODER_COUNTS];
+} flts_14b;
+
+flts readbuf;
+
flts inbuf;
uint32_t bi = 0;
+uint32_t pi = 0;
-FlashStorage(flash_storage, flts);
+FlashStorage(flash_storage_0, flts);
+FlashStorage(flash_storage_1, flts);
+FlashStorage(flash_storage_2, flts);
+FlashStorage(flash_storage_3, flts);
+FlashStorage(flash_storage_4, flts);
+FlashStorage(flash_storage_5, flts);
+FlashStorage(flash_storage_6, flts);
+FlashStorage(flash_storage_7, flts);
void flash_write_init(void){
bi = 0;
+ pi = 0;
}
void flash_write_page(void){
sysError("writing");
- flash_storage.write(inbuf);
- sysError("written");
- // sysError("unlocking block");
- // NVMCTRL->ADDR.reg = (uint32_t)((const uint8_t*)(lut));
- // NVMCTRL->CTRLB.reg = NVMCTRL_CTRLB_CMDEX_KEY | NVMCTRL_CTRLB_CMD_UR;
- // while(NVMCTRL->STATUS.bit.READY == 0);
- // sysError("erasing block");
- // //flashClass.erase((const uint8_t*)lut, 0);
- // NVMCTRL->ADDR.reg = (uint32_t)((const uint8_t*)(lut));
- // NVMCTRL->CTRLB.reg = NVMCTRL_CTRLB_CMDEX_KEY | NVMCTRL_CTRLB_CMD_EB;
- // // is it hung, or is there an error to catch ?
- // // hung !
- // //while(NVMCTRL->STATUS.bit.READY == 0);
- // sysError("writing page");
- // flashClass.write((const uint8_t*)lut, (const uint8_t*)buffer, BYTES_PER_PAGE);
+ switch(pi){
+ case 0:
+ flash_storage_0.write(inbuf);
+ sysError("wrote brick 0");
+ break;
+ case 1:
+ flash_storage_1.write(inbuf);
+ sysError("wrote brick 1");
+ break;
+ case 2:
+ flash_storage_2.write(inbuf);
+ sysError("wrote brick 2");
+ break;
+ case 3:
+ flash_storage_3.write(inbuf);
+ sysError("wrote brick 3");
+ break;
+ case 4:
+ flash_storage_4.write(inbuf);
+ sysError("wrote brick 4");
+ break;
+ case 5:
+ flash_storage_5.write(inbuf);
+ sysError("wrote brick 5");
+ break;
+ case 6:
+ flash_storage_6.write(inbuf);
+ sysError("wrote brick 6");
+ break;
+ case 7:
+ flash_storage_7.write(inbuf);
+ sysError("wrote brick 7");
+ break;
+ default:
+ sysError("oob page write");
+ break;
+ } // end switch
+ pi ++;
+ delay(100);
}
void flash_write_value(float val){
inbuf.f[bi ++] = val;
if(bi >= LUT_SIZE){
flash_write_page();
+ bi = 0;
}
}
void Step_CL::print_table(void){
- sysError("reading");
- flts read = flash_storage.read();
+ sysError("reading 0");
+ inbuf = flash_storage_0.read();
+ for(uint16_t e = 0; e < LUT_SIZE; e ++){
+ sysError(String(inbuf.f[e]));
+ delay(2);
+ }
+ sysError("reading 1");
+ inbuf = flash_storage_1.read();
+ for(uint16_t e = 0; e < LUT_SIZE; e ++){
+ sysError(String(inbuf.f[e]));
+ delay(2);
+ }
+ sysError("reading 2");
+ inbuf = flash_storage_2.read();
+ for(uint16_t e = 0; e < LUT_SIZE; e ++){
+ sysError(String(inbuf.f[e]));
+ delay(5);
+ }
+ sysError("reading 3");
+ inbuf = flash_storage_3.read();
for(uint16_t e = 0; e < LUT_SIZE; e ++){
- sysError(String(read.f[e]));
+ sysError(String(inbuf.f[e]));
delay(5);
}
}
@@ -110,7 +168,7 @@ void Step_CL::print_table(void){
// the calib routine
boolean Step_CL::calibrate(void){
flash_write_init();
- for(uint32_t i = 0; i < LUT_SIZE; i ++){
+ for(uint32_t i = 0; i < ENCODER_COUNTS; i ++){
flash_write_value(i * 1.1F);
}
return true;
diff --git a/firmware/cl-step-controller/src/utils/FlashStorage.cpp b/firmware/cl-step-controller/src/utils/FlashStorage.cpp
index 315630b..2e21948 100644
--- a/firmware/cl-step-controller/src/utils/FlashStorage.cpp
+++ b/firmware/cl-step-controller/src/utils/FlashStorage.cpp
@@ -18,6 +18,7 @@
*/
#include "FlashStorage.h"
+#include "syserror.h"
static const uint32_t pageSizes[] = { 8, 16, 32, 64, 128, 256, 512, 1024 };
@@ -46,15 +47,18 @@ static inline uint32_t read_unaligned_uint32(const void *data){
// Invalidate all CMCC cache entries if CMCC cache is enabled.
static void invalidate_CMCC_cache(){
- if (CMCC->SR.bit.CSTS) { // CR -> SR
- CMCC->CTRL.bit.CEN = 0;
- while (CMCC->SR.bit.CSTS) {}
- CMCC->MAINT0.bit.INVALL = 1;
- CMCC->CTRL.bit.CEN = 1;
- }
+ /*
+ if (CMCC->SR.bit.CSTS) { // CR -> SR
+ CMCC->CTRL.bit.CEN = 0;
+ while (CMCC->SR.bit.CSTS) {}
+ CMCC->MAINT0.bit.INVALL = 1;
+ CMCC->CTRL.bit.CEN = 1;
+ }
+ */
}
void FlashClass::write(const volatile void *flash_ptr, const void *data, uint32_t size){
+ /*
// Calculate data boundaries
size = (size + 3) / 4;
volatile uint32_t *dst_addr = (volatile uint32_t *)flash_ptr;
@@ -85,6 +89,7 @@ void FlashClass::write(const volatile void *flash_ptr, const void *data, uint32_
}
// Execute "WP" Write Page
+ sysError("write 0x" + String((uint32_t)flash_ptr));
NVMCTRL->CTRLB.reg = NVMCTRL_CTRLB_CMDEX_KEY | NVMCTRL_CTRLB_CMD_WP;
while (NVMCTRL->INTFLAG.bit.DONE == 0) { }
invalidate_CMCC_cache();
@@ -92,26 +97,32 @@ void FlashClass::write(const volatile void *flash_ptr, const void *data, uint32_
NVMCTRL->CTRLA.bit.CACHEDIS0 = original_CACHEDIS0;
NVMCTRL->CTRLA.bit.CACHEDIS1 = original_CACHEDIS1;
}
+ */
}
void FlashClass::erase(const volatile void *flash_ptr, uint32_t size){
- const uint8_t *ptr = (const uint8_t *)flash_ptr;
- while (size > ROW_SIZE) {
+ /*
+ const uint8_t *ptr = (const uint8_t *)flash_ptr;
+ while (size > ROW_SIZE) {
+ erase(ptr);
+ ptr += ROW_SIZE;
+ size -= ROW_SIZE;
+ }
erase(ptr);
- ptr += ROW_SIZE;
- size -= ROW_SIZE;
- }
- erase(ptr);
+ */
}
void FlashClass::erase(const volatile void *flash_ptr){
- NVMCTRL->ADDR.reg = ((uint32_t)flash_ptr);
- NVMCTRL->CTRLB.reg = NVMCTRL_CTRLB_CMDEX_KEY | NVMCTRL_CTRLB_CMD_EB;
- while (!NVMCTRL->INTFLAG.bit.DONE) { }
- invalidate_CMCC_cache();
+ /*
+ sysError("erase 0x" + String((uint32_t)flash_ptr));
+ NVMCTRL->ADDR.reg = ((uint32_t)flash_ptr);
+ NVMCTRL->CTRLB.reg = NVMCTRL_CTRLB_CMDEX_KEY | NVMCTRL_CTRLB_CMD_EB;
+ while (!NVMCTRL->INTFLAG.bit.DONE) { }
+ invalidate_CMCC_cache();
+ */
}
void FlashClass::read(const volatile void *flash_ptr, void *data, uint32_t size){
- memcpy(data, (const void *)flash_ptr, size);
+ memcpy(data, (const void *)flash_ptr, size);
}
diff --git a/firmware/cl-step-controller/src/utils/FlashStorage.h b/firmware/cl-step-controller/src/utils/FlashStorage.h
index 0b77bbe..62918f8 100644
--- a/firmware/cl-step-controller/src/utils/FlashStorage.h
+++ b/firmware/cl-step-controller/src/utils/FlashStorage.h
@@ -62,7 +62,7 @@ public:
// Write data into flash memory.
// Compiler is able to optimize parameter copy.
- inline void write(T data) { flash.erase(); flash.write(&data); }
+ inline void write(T data) { flash.erase(); flash.write(&data); } // erase &data ?
// Read data from flash into variable.
inline void read(T *data) { flash.read(data); }
diff --git a/log/cl-step-control-log.md b/log/cl-step-control-log.md
index 4492643..1c38f59 100644
--- a/log/cl-step-control-log.md
+++ b/log/cl-step-control-log.md
@@ -874,4 +874,28 @@ OK, today will bring this library into the local build and see about figuring wh
This means a block is 8192, makes sense this is where flashstorage aligns itself. I need 8 blocks total for the full LUT.
-Interesting, now that I fixed this error which appeared when it was compiling locally, I can get past 512 bytes with my example. Could try the big one...
\ No newline at end of file
+Interesting, now that I fixed this error which appeared when it was compiling locally, I can get past 512 bytes with my example. Could try the big one...
+
+OK, but doesn't work past 8192 bytes - I'll try just over the boundary to check again. At the full spec, it indeed doesn't even start up. Can get to 4096 floats, but 8192 breaks things.
+
+Last check for easy answers, I'll see if I can just tag 4x4096 FlashStorage instances together. OK, looks like I can get away with this. Damn, that was promising but it locks up on block #3. It doesn't matter which one I try to write first: i.e. it's not that prior writes fill up space for the latter, even if I try to write to the 3rd brick at the start, it hangs. OK very strange: can write all bricks except for the 3rd...
+
+Eh, IDK anymore, I can't write more than twice regardless of which brick I'm writing to. Big shrug, going to try with bricks of 2048 size. Need 8 of those for the same total-bounds errors... OK, having the same problem here. These should be blocks. I can try once more, with 1024 floats each, just to be sure.
+
+Nope, errors around the same spot. So I should check in the code to see if I can figure out where this is hanging up... At this point I suspect I am having some low level error from an NVMCTRL command, or, somehow the ptrs are pointing into bad spaces.
+
+Trying:
+- no write (fails block 3)
+- no erase (fails block 3)
+- no invalidate cache (same)
+- *no* write fn (same)
+- *no* erase fn
+
+Suspect ROW_SIZE something is up,
+- no while(>size) in erase
+- no ptr op in erase fn
+
+OK this is crazy, I have every fn in the class commented out, and the thing still locks up.
+
+- neil suggests watching the power rails, flash req
+- nuclear option is asking neil to chat w/ microchip contacts
\ No newline at end of file
--
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