Commit cf512432 authored by Prashant Patil's avatar Prashant Patil

removed crystal and added resonator

parent 31a808c7
Pipeline #1095 passed with stage
in 52 seconds
......@@ -24,7 +24,7 @@
<layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/>
<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/>
<layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/>
<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
<layer number="16" name="Bottom" color="1" fill="1" visible="no" active="yes"/>
<layer number="17" name="Pads" color="2" fill="1" visible="no" active="yes"/>
<layer number="18" name="Vias" color="2" fill="1" visible="no" active="yes"/>
<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>
......@@ -148,29 +148,6 @@
<libraries>
<library name="fabPatil">
<packages>
<package name="SOD123">
<description>&lt;b&gt;SMALL OUTLINE DIODE&lt;/b&gt;</description>
<wire x1="-2.973" y1="0.983" x2="2.973" y2="0.983" width="0.0508" layer="39"/>
<wire x1="2.973" y1="-0.983" x2="-2.973" y2="-0.983" width="0.0508" layer="39"/>
<wire x1="-2.973" y1="-0.983" x2="-2.973" y2="0.983" width="0.0508" layer="39"/>
<wire x1="2.973" y1="0.983" x2="2.973" y2="-0.983" width="0.0508" layer="39"/>
<wire x1="-1.321" y1="0.787" x2="1.321" y2="0.787" width="0.1016" layer="51"/>
<wire x1="-1.321" y1="-0.787" x2="1.321" y2="-0.787" width="0.1016" layer="51"/>
<wire x1="-1.321" y1="-0.787" x2="-1.321" y2="0.787" width="0.1016" layer="51"/>
<wire x1="1.321" y1="-0.787" x2="1.321" y2="0.787" width="0.1016" layer="51"/>
<wire x1="-1" y1="0" x2="0" y2="0.5" width="0.2032" layer="51"/>
<wire x1="0" y1="0.5" x2="0" y2="-0.5" width="0.2032" layer="51"/>
<wire x1="0" y1="-0.5" x2="-1" y2="0" width="0.2032" layer="51"/>
<wire x1="-1" y1="0.5" x2="-1" y2="0" width="0.2032" layer="51"/>
<wire x1="-1" y1="0" x2="-1" y2="-0.5" width="0.2032" layer="51"/>
<smd name="CATHODE" x="-1.7" y="0" dx="1.6" dy="0.8" layer="1"/>
<smd name="ANODE" x="1.7" y="0" dx="1.6" dy="0.8" layer="1"/>
<text x="-1.905" y="1.905" size="1.27" layer="25">&gt;NAME</text>
<text x="-1.905" y="-0.635" size="1.27" layer="27">&gt;VALUE</text>
<rectangle x1="-1.9558" y1="-0.3048" x2="-1.3716" y2="0.3048" layer="51" rot="R180"/>
<rectangle x1="1.3716" y1="-0.3048" x2="1.9558" y2="0.3048" layer="51" rot="R180"/>
<rectangle x1="-0.4001" y1="-0.7" x2="0.4001" y2="0.7" layer="35"/>
</package>
<package name="1206">
<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;
chip</description>
......@@ -550,8 +527,6 @@ design rules under a new name.</description>
</pass>
</autorouter>
<elements>
<element name="D1" library="fabPatil" package="SOD123" value="3.3V" x="21.1836" y="17.907" rot="R90"/>
<element name="D2" library="fabPatil" package="SOD123" value="3.3V" x="18.2626" y="16.256" rot="R90"/>
<element name="R1" library="fabPatil" package="1206" value="499" x="26.0858" y="13.3604"/>
<element name="R2" library="fabPatil" package="1206" value="499" x="26.0858" y="15.8242"/>
<element name="JP1" library="fabPatil" package="1X06-SMD" value="FTDI" x="54.6354" y="15.5956" rot="R90"/>
......@@ -577,8 +552,6 @@ design rules under a new name.</description>
</elements>
<signals>
<signal name="GND">
<contactref element="D1" pad="ANODE"/>
<contactref element="D2" pad="ANODE"/>
<contactref element="JP1" pad="6"/>
<contactref element="C1" pad="1"/>
<contactref element="JP2" pad="GND"/>
......@@ -621,13 +594,11 @@ design rules under a new name.</description>
<wire x1="46.1394" y1="10.51451875" x2="46.1394" y2="6.7056" width="0.3556" layer="1"/>
<wire x1="24.6892" y1="20.828" x2="24.6892" y2="18.288" width="0.4064" layer="1"/>
<wire x1="24.6892" y1="18.288" x2="24.6638" y2="18.2626" width="0.4064" layer="1"/>
<wire x1="24.6892" y1="20.828" x2="22.4046" y2="20.828" width="0.4064" layer="1"/>
<wire x1="21.1836" y1="19.607" x2="22.4046" y2="20.828" width="0.4064" layer="1"/>
<wire x1="20.3166" y1="18.74" x2="21.1836" y2="19.607" width="0.4064" layer="1"/>
<wire x1="18.415" y1="18.74" x2="7.1126" y2="18.74" width="0.4064" layer="1"/>
<wire x1="18.415" y1="18.74" x2="20.3166" y2="18.74" width="0.4064" layer="1"/>
<wire x1="18.2626" y1="17.956" x2="18.2626" y2="18.5876" width="0.4064" layer="1"/>
<wire x1="18.2626" y1="18.5876" x2="18.415" y2="18.74" width="0.4064" layer="1"/>
<wire x1="22.4046" y1="20.828" x2="24.6892" y2="20.828" width="0.4064" layer="1"/>
<wire x1="20.3166" y1="18.74" x2="20.0152" y2="18.74" width="0.4064" layer="1"/>
<wire x1="20.0152" y1="18.74" x2="7.1126" y2="18.74" width="0.4064" layer="1"/>
<wire x1="20.0152" y1="18.74" x2="20.3166" y2="18.74" width="0.4064" layer="1"/>
<wire x1="20.3166" y1="18.74" x2="22.4046" y2="20.828" width="0.4064" layer="1"/>
</signal>
<signal name="VCC">
<contactref element="JP2" pad="5V"/>
......@@ -654,9 +625,9 @@ design rules under a new name.</description>
<wire x1="49.3268" y1="23.4438" x2="49.3268" y2="19.2786" width="0.4064" layer="1"/>
<wire x1="27.5586" y1="23.3426" x2="27.5586" y2="23.4438" width="0.4064" layer="1"/>
<wire x1="27.5586" y1="23.4438" x2="31.5214" y2="23.4438" width="0.4064" layer="1"/>
<wire x1="55.9854" y1="16.8656" x2="51.9938" y2="16.8656" width="0.4064" layer="1"/>
<wire x1="51.9938" y1="16.8656" x2="51.9938" y2="19.304" width="0.4064" layer="1"/>
<wire x1="51.9938" y1="19.304" x2="48.9956" y2="19.304" width="0.4064" layer="1"/>
<wire x1="55.9854" y1="16.8656" x2="52.6034" y2="16.8656" width="0.4064" layer="1"/>
<wire x1="52.6034" y1="16.8656" x2="52.6034" y2="19.304" width="0.4064" layer="1"/>
<wire x1="52.6034" y1="19.304" x2="48.9956" y2="19.304" width="0.4064" layer="1"/>
<wire x1="48.9956" y1="19.304" x2="48.9956" y2="19.2786" width="0.4064" layer="1"/>
<wire x1="26.1236" y1="22.18799375" x2="26.1236" y2="11.8286" width="0.3556" layer="1"/>
<wire x1="26.1236" y1="11.8286" x2="26.0982" y2="11.8286" width="0.3556" layer="1"/>
......@@ -666,23 +637,20 @@ design rules under a new name.</description>
<wire x1="31.2816" y1="12.3892" x2="30.6324" y2="11.74" width="0.3556" layer="1"/>
</signal>
<signal name="N$2">
<contactref element="D2" pad="CATHODE"/>
<contactref element="R1" pad="1"/>
<contactref element="JP2" pad="D-"/>
<wire x1="7.6126" y1="14.24" x2="17.9466" y2="14.24" width="0.4064" layer="1"/>
<wire x1="18.2626" y1="14.556" x2="17.9466" y2="14.24" width="0.4064" layer="1"/>
<wire x1="24.6638" y1="13.3604" x2="19.4582" y2="13.3604" width="0.4064" layer="1"/>
<wire x1="19.4582" y1="13.3604" x2="18.2626" y2="14.556" width="0.4064" layer="1"/>
<wire x1="17.9466" y1="14.24" x2="7.6126" y2="14.24" width="0.4064" layer="1"/>
<wire x1="24.6638" y1="13.3604" x2="19.7358" y2="13.3604" width="0.4064" layer="1"/>
<wire x1="19.7358" y1="13.3604" x2="19.4582" y2="13.3604" width="0.4064" layer="1"/>
<wire x1="19.7358" y1="13.3604" x2="18.8262" y2="13.3604" width="0.4064" layer="1"/>
<wire x1="18.8262" y1="13.3604" x2="17.9466" y2="14.24" width="0.4064" layer="1"/>
</signal>
<signal name="N$1">
<contactref element="D1" pad="CATHODE"/>
<contactref element="R2" pad="1"/>
<contactref element="JP2" pad="D+"/>
<wire x1="24.6892" y1="16.207" x2="24.6638" y2="15.8242" width="0.4064" layer="1"/>
<wire x1="21.1506" y1="16.24" x2="7.6126" y2="16.24" width="0.4064" layer="1"/>
<wire x1="21.1506" y1="16.24" x2="21.1836" y2="16.207" width="0.4064" layer="1"/>
<wire x1="24.6638" y1="15.8242" x2="21.5664" y2="15.8242" width="0.4064" layer="1"/>
<wire x1="21.5664" y1="15.8242" x2="21.1506" y2="16.24" width="0.4064" layer="1"/>
<wire x1="24.6638" y1="15.8242" x2="24.6892" y2="16.207" width="0.4064" layer="1"/>
<wire x1="24.248" y1="16.24" x2="24.6638" y2="15.8242" width="0.4064" layer="1"/>
<wire x1="7.6126" y1="16.24" x2="24.248" y2="16.24" width="0.4064" layer="1"/>
</signal>
<signal name="N$6">
<polygon width="0.4064" layer="16" orphans="yes" thermals="no">
......@@ -731,18 +699,18 @@ design rules under a new name.</description>
<contactref element="IC1" pad="24"/>
<contactref element="R3" pad="1"/>
<wire x1="33.4712" y1="20.9804" x2="33.4712" y2="19.4818" width="0.3556" layer="1"/>
<wire x1="50.51810625" y1="15.494" x2="50.8752" y2="15.85109375" width="0.4064" layer="1"/>
<wire x1="50.8752" y1="15.85109375" x2="50.8752" y2="17.62610625" width="0.4064" layer="1"/>
<wire x1="50.8752" y1="17.62610625" x2="50.51810625" y2="17.9832" width="0.4064" layer="1"/>
<wire x1="43.5356" y1="14.1986" x2="44.831" y2="15.494" width="0.4064" layer="1"/>
<wire x1="44.831" y1="15.494" x2="50.51810625" y2="15.494" width="0.4064" layer="1"/>
<wire x1="50.51810625" y1="17.9832" x2="47.3202" y2="17.9832" width="0.4064" layer="1"/>
<wire x1="47.3202" y1="17.9832" x2="46.2534" y2="19.05" width="0.4064" layer="1"/>
<wire x1="46.2534" y1="19.05" x2="47.3202" y2="17.9832" width="0.4064" layer="1"/>
<wire x1="46.2534" y1="20.954515625" x2="46.2534" y2="19.05" width="0.4064" layer="1"/>
<wire x1="46.2534" y1="20.954515625" x2="46.227515625" y2="20.9804" width="0.4064" layer="1"/>
<wire x1="33.4712" y1="20.9804" x2="46.227515625" y2="20.9804" width="0.4064" layer="1"/>
<wire x1="31.5214" y1="20.5998" x2="31.5214" y2="20.9804" width="0.4064" layer="1"/>
<wire x1="31.5214" y1="20.9804" x2="33.4712" y2="20.9804" width="0.4064" layer="1"/>
<wire x1="51.2318" y1="15.494" x2="50.292" y2="15.494" width="0.4064" layer="1"/>
<wire x1="47.3202" y1="17.9832" x2="51.2318" y2="17.9832" width="0.4064" layer="1"/>
<wire x1="51.2318" y1="17.9832" x2="51.2318" y2="15.494" width="0.4064" layer="1"/>
<wire x1="50.292" y1="15.494" x2="50.51810625" y2="15.494" width="0" layer="19" extent="1-1"/>
</signal>
<signal name="SCK">
<contactref element="U$1" pad="3"/>
......
This diff is collapsed.
[Eagle]
Version="08 03 02"
Platform="Windows"
Globals="Globals"
Desktop="Desktop"
[Globals]
AutoSaveProject=1
UsedLibraryUrn="urn:adsk.eagle:library:105"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/FAB_Hello.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/fab.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/fabPatil.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/ng.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/usb_con-update.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/Adafruit/adafruit.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/LilyPad-Wearables.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Aesthetics.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-AnalogIC.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Boards.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Capacitors.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Connectors.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-DigitalIC.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-DiscreteSemi.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Displays.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Electromechanical.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-FreqCtrl.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-LED.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Passives.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-PowerIC.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-RF.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Resistors.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Retired.lbr"
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Sensors.lbr"
[Win_1]
Type="Schematic Editor"
Loc="0 0 1919 1017"
State=1
Number=1
File="FabFTDI.sch"
View="-76.0648 -84.3413 122.682 42.3498"
WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524"
PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
ViaDiameters=" 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.3 0"
ViaDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35"
HoleDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35"
TextSizes=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.778"
PolygonSpacings=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27"
PolygonIsolates=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
MiterRadiuss=" 0.254 0.3175 0.635 1.27 2.54 1 2 2.5 5 7.5 10 0"
DimensionWidths=" 0 0.127 0.254 0.1 0.26 0.13"
DimensionExtWidths=" 0.127 0.254 0.1 0.13 0.26 0"
DimensionExtLengths=" 1.27 2.54 1 2 3 0"
DimensionExtOffsets=" 1.27 2.54 1 2 3 0"
SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635"
WireBend=0
WireBendSet=31
WireCap=1
MiterStyle=0
PadShape=0
ViaShape=1
PolygonPour=0
PolygonRank=0
PolygonThermals=1
PolygonOrphans=0
TextRatio=8
DimensionUnit=1
DimensionPrecision=2
DimensionShowUnit=0
PinDirection=3
PinFunction=0
PinLength=2
PinVisible=3
SwapLevel=0
ArcDirection=0
AddLevel=2
PadsSameType=0
Layer=91
Views=" 1: -76.0648 -84.3413 122.682 42.3498"
Sheet="1"
[Win_2]
Type="Board Editor"
Loc="0 0 1919 1017"
State=1
Number=2
File="FabFTDI.brd"
View="-27.4607 -10.3639 92.3738 43.1346"
WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524 0.4064"
PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
ViaDiameters=" 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.3 0"
ViaDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35"
HoleDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35"
TextSizes=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.778"
PolygonSpacings=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27"
PolygonIsolates=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
MiterRadiuss=" 0.254 0.3175 0.635 1.27 2.54 1 2 2.5 5 7.5 10 0"
DimensionWidths=" 0 0.127 0.254 0.1 0.26 0.13"
DimensionExtWidths=" 0.127 0.254 0.1 0.13 0.26 0"
DimensionExtLengths=" 1.27 2.54 1 2 3 0"
DimensionExtOffsets=" 1.27 2.54 1 2 3 0"
SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635"
WireBend=1
WireBendSet=0
WireCap=1
MiterStyle=0
PadShape=0
ViaShape=1
PolygonPour=0
PolygonRank=1
PolygonThermals=1
PolygonOrphans=0
TextRatio=8
DimensionUnit=1
DimensionPrecision=2
DimensionShowUnit=0
PinDirection=3
PinFunction=0
PinLength=2
PinVisible=3
SwapLevel=0
ArcDirection=0
AddLevel=2
PadsSameType=0
Layer=1
[Win_3]
Type="Control Panel"
Loc="0 0 1919 1017"
State=1
Number=0
[Desktop]
Screen="1920 1080"
Window="Win_1"
Window="Win_2"
Window="Win_3"
This diff is collapsed.
This diff is collapsed.
FabFTDI_Board.png

49.5 KB | W: | H:

FabFTDI_Board.png

85.5 KB | W: | H:

FabFTDI_Board.png
FabFTDI_Board.png
FabFTDI_Board.png
FabFTDI_Board.png
  • 2-up
  • Swipe
  • Onion skin
FabFTDI_Schematic.png

225 KB | W: | H:

FabFTDI_Schematic.png

562 KB | W: | H:

FabFTDI_Schematic.png
FabFTDI_Schematic.png
FabFTDI_Schematic.png
FabFTDI_Schematic.png
  • 2-up
  • Swipe
  • Onion skin
FabFTDI_package/FabFTDI_Boudry.png

10.5 KB | W: | H:

FabFTDI_package/FabFTDI_Boudry.png

8.16 KB | W: | H:

FabFTDI_package/FabFTDI_Boudry.png
FabFTDI_package/FabFTDI_Boudry.png
FabFTDI_package/FabFTDI_Boudry.png
FabFTDI_package/FabFTDI_Boudry.png
  • 2-up
  • Swipe
  • Onion skin
FabFTDI_package/FabFTDI_Trace.png

21.7 KB | W: | H:

FabFTDI_package/FabFTDI_Trace.png

14.6 KB | W: | H:

FabFTDI_package/FabFTDI_Trace.png
FabFTDI_package/FabFTDI_Trace.png
FabFTDI_package/FabFTDI_Trace.png
FabFTDI_package/FabFTDI_Trace.png
  • 2-up
  • Swipe
  • Onion skin
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
......@@ -142,29 +142,6 @@
<libraries>
<library name="fabPatil">
<packages>
<package name="SOD123">
<description>&lt;b&gt;SMALL OUTLINE DIODE&lt;/b&gt;</description>
<wire x1="-2.973" y1="0.983" x2="2.973" y2="0.983" width="0.0508" layer="39"/>
<wire x1="2.973" y1="-0.983" x2="-2.973" y2="-0.983" width="0.0508" layer="39"/>
<wire x1="-2.973" y1="-0.983" x2="-2.973" y2="0.983" width="0.0508" layer="39"/>
<wire x1="2.973" y1="0.983" x2="2.973" y2="-0.983" width="0.0508" layer="39"/>
<wire x1="-1.321" y1="0.787" x2="1.321" y2="0.787" width="0.1016" layer="51"/>
<wire x1="-1.321" y1="-0.787" x2="1.321" y2="-0.787" width="0.1016" layer="51"/>
<wire x1="-1.321" y1="-0.787" x2="-1.321" y2="0.787" width="0.1016" layer="51"/>
<wire x1="1.321" y1="-0.787" x2="1.321" y2="0.787" width="0.1016" layer="51"/>
<wire x1="-1" y1="0" x2="0" y2="0.5" width="0.2032" layer="51"/>
<wire x1="0" y1="0.5" x2="0" y2="-0.5" width="0.2032" layer="51"/>
<wire x1="0" y1="-0.5" x2="-1" y2="0" width="0.2032" layer="51"/>
<wire x1="-1" y1="0.5" x2="-1" y2="0" width="0.2032" layer="51"/>
<wire x1="-1" y1="0" x2="-1" y2="-0.5" width="0.2032" layer="51"/>
<smd name="CATHODE" x="-1.7" y="0" dx="1.6" dy="0.8" layer="1"/>
<smd name="ANODE" x="1.7" y="0" dx="1.6" dy="0.8" layer="1"/>
<text x="-1.905" y="1.905" size="1.27" layer="25">&gt;NAME</text>
<text x="-1.905" y="-0.635" size="1.27" layer="27">&gt;VALUE</text>
<rectangle x1="-1.9558" y1="-0.3048" x2="-1.3716" y2="0.3048" layer="51" rot="R180"/>
<rectangle x1="1.3716" y1="-0.3048" x2="1.9558" y2="0.3048" layer="51" rot="R180"/>
<rectangle x1="-0.4001" y1="-0.7" x2="0.4001" y2="0.7" layer="35"/>
</package>
<package name="1206">
<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;
chip</description>
......@@ -418,18 +395,6 @@ For boards designed to be plugged directly into a USB slot. If possible, ensure
</package>
</packages>
<symbols>
<symbol name="ZENER">
<wire x1="-1.27" y1="-1.27" x2="1.27" y2="0" width="0.254" layer="94"/>
<wire x1="1.27" y1="0" x2="-1.27" y2="1.27" width="0.254" layer="94"/>
<wire x1="1.27" y1="1.27" x2="1.27" y2="0" width="0.254" layer="94"/>
<wire x1="-1.27" y1="1.27" x2="-1.27" y2="-1.27" width="0.254" layer="94"/>
<wire x1="1.27" y1="0" x2="1.27" y2="-1.27" width="0.254" layer="94"/>
<wire x1="1.27" y1="-1.27" x2="0.635" y2="-1.27" width="0.254" layer="94"/>
<text x="-1.778" y="1.905" size="1.778" layer="95">&gt;NAME</text>
<text x="-1.778" y="-3.429" size="1.778" layer="96">&gt;VALUE</text>
<pin name="ANODE" x="-2.54" y="0" visible="off" length="short" direction="pas"/>
<pin name="CATHODE" x="2.54" y="0" visible="off" length="short" direction="pas" rot="R180"/>
</symbol>
<symbol name="RESISTOR">
<wire x1="-2.54" y1="0" x2="-2.159" y2="1.016" width="0.2032" layer="94"/>
<wire x1="-2.159" y1="1.016" x2="-1.524" y2="-1.016" width="0.2032" layer="94"/>
......@@ -539,23 +504,6 @@ For boards designed to be plugged directly into a USB slot. If possible, ensure
</symbol>
</symbols>
<devicesets>
<deviceset name="ZENER_DIODE" prefix="D" uservalue="yes">
<description>zener diode</description>
<gates>
<gate name="1" symbol="ZENER" x="0" y="0"/>
</gates>
<devices>
<device name="SOD123" package="SOD123">
<connects>
<connect gate="1" pin="ANODE" pad="ANODE"/>
<connect gate="1" pin="CATHODE" pad="CATHODE"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="RESISTOR" prefix="R" uservalue="yes">
<gates>
<gate name="G$1" symbol="RESISTOR" x="0" y="0"/>
......@@ -2144,11 +2092,8 @@ Source: 008-0260-0_E.pdf</description>
<part name="P+1" library="FAB_Hello" deviceset="VCC" device=""/>
<part name="GND1" library="FAB_Hello" deviceset="GND" device=""/>
<part name="GND2" library="FAB_Hello" deviceset="GND" device=""/>
<part name="D1" library="fabPatil" deviceset="ZENER_DIODE" device="SOD123" value="3.3V"/>
<part name="D2" library="fabPatil" deviceset="ZENER_DIODE" device="SOD123" value="3.3V"/>
<part name="GND3" library="FAB_Hello" deviceset="GND" device=""/>
<part name="R1" library="fabPatil" deviceset="RESISTOR" device="1206" value="22"/>
<part name="R2" library="fabPatil" deviceset="RESISTOR" device="1206" value="22"/>
<part name="R1" library="fabPatil" deviceset="RESISTOR" device="1206" value="499"/>
<part name="R2" library="fabPatil" deviceset="RESISTOR" device="1206" value="499"/>
<part name="P+2" library="FAB_Hello" deviceset="VCC" device=""/>
<part name="JP1" library="fabPatil" deviceset="FTDI_CONNECTOR" device="SMD" value="FTDI"/>
<part name="C1" library="fabPatil" deviceset="UNPOLARIZED_CAPACITOR" device="1206" value="0.1uF"/>
......@@ -2185,9 +2130,6 @@ Source: 008-0260-0_E.pdf</description>
<instance part="P+1" gate="VCC" x="-22.86" y="33.02" rot="R90"/>
<instance part="GND1" gate="1" x="-2.54" y="33.02" rot="R90"/>
<instance part="GND2" gate="1" x="-76.2" y="15.24" rot="R270"/>
<instance part="D1" gate="1" x="-66.04" y="-7.62" rot="R90"/>
<instance part="D2" gate="1" x="-71.12" y="-7.62" rot="R90"/>
<instance part="GND3" gate="1" x="-76.2" y="-15.24" rot="R270"/>
<instance part="R1" gate="G$1" x="-60.96" y="2.54"/>
<instance part="R2" gate="G$1" x="-53.34" y="0"/>
<instance part="P+2" gate="VCC" x="-71.12" y="20.32"/>
......@@ -2234,16 +2176,6 @@ Source: 008-0260-0_E.pdf</description>
<wire x1="-78.74" y1="7.62" x2="-73.66" y2="7.62" width="0.1524" layer="91"/>
</segment>
<segment>
<pinref part="D1" gate="1" pin="ANODE"/>
<wire x1="-66.04" y1="-10.16" x2="-66.04" y2="-15.24" width="0.1524" layer="91"/>
<pinref part="GND3" gate="1" pin="GND"/>
<wire x1="-66.04" y1="-15.24" x2="-71.12" y2="-15.24" width="0.1524" layer="91"/>
<pinref part="D2" gate="1" pin="ANODE"/>
<wire x1="-71.12" y1="-15.24" x2="-73.66" y2="-15.24" width="0.1524" layer="91"/>
<wire x1="-71.12" y1="-10.16" x2="-71.12" y2="-15.24" width="0.1524" layer="91"/>
<junction x="-71.12" y="-15.24"/>
</segment>
<segment>
<pinref part="JP1" gate="G$1" pin="GND"/>
<pinref part="GND5" gate="1" pin="GND"/>
<wire x1="45.72" y1="0" x2="68.58" y2="0" width="0.1524" layer="91"/>
......@@ -2335,23 +2267,15 @@ Source: 008-0260-0_E.pdf</description>
</net>
<net name="N$2" class="0">
<segment>
<wire x1="-78.74" y1="2.54" x2="-71.12" y2="2.54" width="0.1524" layer="91"/>
<pinref part="D2" gate="1" pin="CATHODE"/>
<wire x1="-71.12" y1="-5.08" x2="-71.12" y2="2.54" width="0.1524" layer="91"/>
<wire x1="-78.74" y1="2.54" x2="-66.04" y2="2.54" width="0.1524" layer="91"/>
<pinref part="R1" gate="G$1" pin="1"/>
<wire x1="-71.12" y1="2.54" x2="-66.04" y2="2.54" width="0.1524" layer="91"/>
<junction x="-71.12" y="2.54"/>
<pinref part="JP2" gate="G$1" pin="D-"/>
</segment>
</net>
<net name="N$1" class="0">
<segment>
<pinref part="D1" gate="1" pin="CATHODE"/>
<wire x1="-66.04" y1="-5.08" x2="-66.04" y2="0" width="0.1524" layer="91"/>
<wire x1="-78.74" y1="0" x2="-66.04" y2="0" width="0.1524" layer="91"/>
<wire x1="-78.74" y1="0" x2="-58.42" y2="0" width="0.1524" layer="91"/>
<pinref part="R2" gate="G$1" pin="1"/>
<wire x1="-58.42" y1="0" x2="-66.04" y2="0" width="0.1524" layer="91"/>
<junction x="-66.04" y="0"/>
<pinref part="JP2" gate="G$1" pin="D+"/>
</segment>
</net>
......
......@@ -33,13 +33,13 @@ UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Librar
UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Sensors.lbr"
[Win_1]
Type="Board Editor"
Type="Schematic Editor"
Loc="-8 -8 1911 1009"
State=1
Number=2
File="FabFTDI.brd"
View="-10.745 -2.9733 72.4734 34.1784"
WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524 0.4064"
Number=1
File="FabFTDI.sch"
View="-93.0539 -52.379 72.5679 39.989"
WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524"
PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
ViaDiameters=" 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.3 0"
......@@ -54,14 +54,14 @@ DimensionExtWidths=" 0.127 0.254 0.1 0.13 0.26 0"
DimensionExtLengths=" 1.27 2.54 1 2 3 0"
DimensionExtOffsets=" 1.27 2.54 1 2 3 0"
SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635"
WireBend=1
WireBendSet=0
WireBend=0
WireBendSet=31
WireCap=1
MiterStyle=0
PadShape=0
ViaShape=1
PolygonPour=0
PolygonRank=1
PolygonRank=0
PolygonThermals=1
PolygonOrphans=0
TextRatio=8
......@@ -76,15 +76,17 @@ SwapLevel=0
ArcDirection=0
AddLevel=2
PadsSameType=0
Layer=1
Layer=91
Views=" 1: -93.0539 -52.379 72.5679 39.989"
Sheet="1"
[Win_2]
Type="Schematic Editor"
Type="Board Editor"
Loc="-8 -8 1911 1009"
State=1
Number=1
File="FabFTDI.sch"
View="-103.667 -96.5506 182.528 85.8847"
Number=2
File="FabFTDI.brd"
View="-1.19827 -0.519609 59.4849 25.8702"
WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524"
PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
......@@ -100,14 +102,14 @@ DimensionExtWidths=" 0.127 0.254 0.1 0.13 0.26 0"
DimensionExtLengths=" 1.27 2.54 1 2 3 0"
DimensionExtOffsets=" 1.27 2.54 1 2 3 0"
SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635"
WireBend=0
WireBendSet=31
WireBend=1
WireBendSet=0
WireCap=1
MiterStyle=0
PadShape=0
ViaShape=1
PolygonPour=0
PolygonRank=0
PolygonRank=1
PolygonThermals=1
PolygonOrphans=0
TextRatio=8
......@@ -122,9 +124,7 @@ SwapLevel=0
ArcDirection=0
AddLevel=2
PadsSameType=0
Layer=91
Views=" 1: -103.667 -96.5506 182.528 85.8847"
Sheet="1"
Layer=1
[Win_3]
Type="Control Panel"
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment