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FabFTDI
Commit cf512432 authored by Prashant Patil's avatar Prashant Patil
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removed crystal and added resonator

parent 31a808c7
Pipeline #1095 passed with stage
    in 52 seconds
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    Showing with 6316 additions and 2060 deletions
    FabFTDI.b#1 → Crystal version/FabFTDI.brd
    View file @ cf512432
    ...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
    <layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/> <layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/>
    <layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/> <layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/>
    <layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/> <layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/>
    <layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> <layer number="16" name="Bottom" color="1" fill="1" visible="no" active="yes"/>
    <layer number="17" name="Pads" color="2" fill="1" visible="no" active="yes"/> <layer number="17" name="Pads" color="2" fill="1" visible="no" active="yes"/>
    <layer number="18" name="Vias" color="2" fill="1" visible="no" active="yes"/> <layer number="18" name="Vias" color="2" fill="1" visible="no" active="yes"/>
    <layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> <layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>
    ...@@ -148,29 +148,6 @@ ...@@ -148,29 +148,6 @@
    <libraries> <libraries>
    <library name="fabPatil"> <library name="fabPatil">
    <packages> <packages>
    <package name="SOD123">
    <description>&lt;b&gt;SMALL OUTLINE DIODE&lt;/b&gt;</description>
    <wire x1="-2.973" y1="0.983" x2="2.973" y2="0.983" width="0.0508" layer="39"/>
    <wire x1="2.973" y1="-0.983" x2="-2.973" y2="-0.983" width="0.0508" layer="39"/>
    <wire x1="-2.973" y1="-0.983" x2="-2.973" y2="0.983" width="0.0508" layer="39"/>
    <wire x1="2.973" y1="0.983" x2="2.973" y2="-0.983" width="0.0508" layer="39"/>
    <wire x1="-1.321" y1="0.787" x2="1.321" y2="0.787" width="0.1016" layer="51"/>
    <wire x1="-1.321" y1="-0.787" x2="1.321" y2="-0.787" width="0.1016" layer="51"/>
    <wire x1="-1.321" y1="-0.787" x2="-1.321" y2="0.787" width="0.1016" layer="51"/>
    <wire x1="1.321" y1="-0.787" x2="1.321" y2="0.787" width="0.1016" layer="51"/>
    <wire x1="-1" y1="0" x2="0" y2="0.5" width="0.2032" layer="51"/>
    <wire x1="0" y1="0.5" x2="0" y2="-0.5" width="0.2032" layer="51"/>
    <wire x1="0" y1="-0.5" x2="-1" y2="0" width="0.2032" layer="51"/>
    <wire x1="-1" y1="0.5" x2="-1" y2="0" width="0.2032" layer="51"/>
    <wire x1="-1" y1="0" x2="-1" y2="-0.5" width="0.2032" layer="51"/>
    <smd name="CATHODE" x="-1.7" y="0" dx="1.6" dy="0.8" layer="1"/>
    <smd name="ANODE" x="1.7" y="0" dx="1.6" dy="0.8" layer="1"/>
    <text x="-1.905" y="1.905" size="1.27" layer="25">&gt;NAME</text>
    <text x="-1.905" y="-0.635" size="1.27" layer="27">&gt;VALUE</text>
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    <rectangle x1="1.3716" y1="-0.3048" x2="1.9558" y2="0.3048" layer="51" rot="R180"/>
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    </package>
    <package name="1206"> <package name="1206">
    <description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt; <description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;
    chip</description> chip</description>
    ...@@ -550,8 +527,6 @@ design rules under a new name.</description> ...@@ -550,8 +527,6 @@ design rules under a new name.</description>
    </pass> </pass>
    </autorouter> </autorouter>
    <elements> <elements>
    <element name="D1" library="fabPatil" package="SOD123" value="3.3V" x="21.1836" y="17.907" rot="R90"/>
    <element name="D2" library="fabPatil" package="SOD123" value="3.3V" x="18.2626" y="16.256" rot="R90"/>
    <element name="R1" library="fabPatil" package="1206" value="499" x="26.0858" y="13.3604"/> <element name="R1" library="fabPatil" package="1206" value="499" x="26.0858" y="13.3604"/>
    <element name="R2" library="fabPatil" package="1206" value="499" x="26.0858" y="15.8242"/> <element name="R2" library="fabPatil" package="1206" value="499" x="26.0858" y="15.8242"/>
    <element name="JP1" library="fabPatil" package="1X06-SMD" value="FTDI" x="54.6354" y="15.5956" rot="R90"/> <element name="JP1" library="fabPatil" package="1X06-SMD" value="FTDI" x="54.6354" y="15.5956" rot="R90"/>
    ...@@ -577,8 +552,6 @@ design rules under a new name.</description> ...@@ -577,8 +552,6 @@ design rules under a new name.</description>
    </elements> </elements>
    <signals> <signals>
    <signal name="GND"> <signal name="GND">
    <contactref element="D1" pad="ANODE"/>
    <contactref element="D2" pad="ANODE"/>
    <contactref element="JP1" pad="6"/> <contactref element="JP1" pad="6"/>
    <contactref element="C1" pad="1"/> <contactref element="C1" pad="1"/>
    <contactref element="JP2" pad="GND"/> <contactref element="JP2" pad="GND"/>
    ...@@ -621,13 +594,11 @@ design rules under a new name.</description> ...@@ -621,13 +594,11 @@ design rules under a new name.</description>
    <wire x1="46.1394" y1="10.51451875" x2="46.1394" y2="6.7056" width="0.3556" layer="1"/> <wire x1="46.1394" y1="10.51451875" x2="46.1394" y2="6.7056" width="0.3556" layer="1"/>
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    <wire x1="18.2626" y1="18.5876" x2="18.415" y2="18.74" width="0.4064" layer="1"/>
    </signal> </signal>
    <signal name="VCC"> <signal name="VCC">
    <contactref element="JP2" pad="5V"/> <contactref element="JP2" pad="5V"/>
    ...@@ -654,9 +625,9 @@ design rules under a new name.</description> ...@@ -654,9 +625,9 @@ design rules under a new name.</description>
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    <wire x1="55.9854" y1="16.8656" x2="51.9938" y2="16.8656" width="0.4064" layer="1"/> <wire x1="55.9854" y1="16.8656" x2="52.6034" y2="16.8656" width="0.4064" layer="1"/>
    <wire x1="51.9938" y1="16.8656" x2="51.9938" y2="19.304" width="0.4064" layer="1"/> <wire x1="52.6034" y1="16.8656" x2="52.6034" y2="19.304" width="0.4064" layer="1"/>
    <wire x1="51.9938" y1="19.304" x2="48.9956" y2="19.304" width="0.4064" layer="1"/> <wire x1="52.6034" y1="19.304" x2="48.9956" y2="19.304" width="0.4064" layer="1"/>
    <wire x1="48.9956" y1="19.304" x2="48.9956" y2="19.2786" width="0.4064" layer="1"/> <wire x1="48.9956" y1="19.304" x2="48.9956" y2="19.2786" width="0.4064" layer="1"/>
    <wire x1="26.1236" y1="22.18799375" x2="26.1236" y2="11.8286" width="0.3556" layer="1"/> <wire x1="26.1236" y1="22.18799375" x2="26.1236" y2="11.8286" width="0.3556" layer="1"/>
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    ...@@ -666,23 +637,20 @@ design rules under a new name.</description> ...@@ -666,23 +637,20 @@ design rules under a new name.</description>
    <wire x1="31.2816" y1="12.3892" x2="30.6324" y2="11.74" width="0.3556" layer="1"/> <wire x1="31.2816" y1="12.3892" x2="30.6324" y2="11.74" width="0.3556" layer="1"/>
    </signal> </signal>
    <signal name="N$2"> <signal name="N$2">
    <contactref element="D2" pad="CATHODE"/>
    <contactref element="R1" pad="1"/> <contactref element="R1" pad="1"/>
    <contactref element="JP2" pad="D-"/> <contactref element="JP2" pad="D-"/>
    <wire x1="7.6126" y1="14.24" x2="17.9466" y2="14.24" width="0.4064" layer="1"/> <wire x1="17.9466" y1="14.24" x2="7.6126" y2="14.24" width="0.4064" layer="1"/>
    <wire x1="18.2626" y1="14.556" x2="17.9466" y2="14.24" width="0.4064" layer="1"/> <wire x1="24.6638" y1="13.3604" x2="19.7358" y2="13.3604" width="0.4064" layer="1"/>
    <wire x1="24.6638" y1="13.3604" x2="19.4582" y2="13.3604" width="0.4064" layer="1"/> <wire x1="19.7358" y1="13.3604" x2="19.4582" y2="13.3604" width="0.4064" layer="1"/>
    <wire x1="19.4582" y1="13.3604" x2="18.2626" y2="14.556" width="0.4064" layer="1"/> <wire x1="19.7358" y1="13.3604" x2="18.8262" y2="13.3604" width="0.4064" layer="1"/>
    <wire x1="18.8262" y1="13.3604" x2="17.9466" y2="14.24" width="0.4064" layer="1"/>
    </signal> </signal>
    <signal name="N$1"> <signal name="N$1">
    <contactref element="D1" pad="CATHODE"/>
    <contactref element="R2" pad="1"/> <contactref element="R2" pad="1"/>
    <contactref element="JP2" pad="D+"/> <contactref element="JP2" pad="D+"/>
    <wire x1="24.6892" y1="16.207" x2="24.6638" y2="15.8242" width="0.4064" layer="1"/> <wire x1="24.6638" y1="15.8242" x2="24.6892" y2="16.207" width="0.4064" layer="1"/>
    <wire x1="21.1506" y1="16.24" x2="7.6126" y2="16.24" width="0.4064" layer="1"/> <wire x1="24.248" y1="16.24" x2="24.6638" y2="15.8242" width="0.4064" layer="1"/>
    <wire x1="21.1506" y1="16.24" x2="21.1836" y2="16.207" width="0.4064" layer="1"/> <wire x1="7.6126" y1="16.24" x2="24.248" y2="16.24" width="0.4064" layer="1"/>
    <wire x1="24.6638" y1="15.8242" x2="21.5664" y2="15.8242" width="0.4064" layer="1"/>
    <wire x1="21.5664" y1="15.8242" x2="21.1506" y2="16.24" width="0.4064" layer="1"/>
    </signal> </signal>
    <signal name="N$6"> <signal name="N$6">
    <polygon width="0.4064" layer="16" orphans="yes" thermals="no"> <polygon width="0.4064" layer="16" orphans="yes" thermals="no">
    ...@@ -731,18 +699,18 @@ design rules under a new name.</description> ...@@ -731,18 +699,18 @@ design rules under a new name.</description>
    <contactref element="IC1" pad="24"/> <contactref element="IC1" pad="24"/>
    <contactref element="R3" pad="1"/> <contactref element="R3" pad="1"/>
    <wire x1="33.4712" y1="20.9804" x2="33.4712" y2="19.4818" width="0.3556" layer="1"/> <wire x1="33.4712" y1="20.9804" x2="33.4712" y2="19.4818" width="0.3556" layer="1"/>
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    <wire x1="50.8752" y1="17.62610625" x2="50.51810625" y2="17.9832" width="0.4064" layer="1"/>
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    <wire x1="50.51810625" y1="17.9832" x2="47.3202" y2="17.9832" width="0.4064" layer="1"/> <wire x1="46.2534" y1="19.05" x2="47.3202" y2="17.9832" width="0.4064" layer="1"/>
    <wire x1="47.3202" y1="17.9832" x2="46.2534" y2="19.05" width="0.4064" layer="1"/>
    <wire x1="46.2534" y1="20.954515625" x2="46.2534" y2="19.05" width="0.4064" layer="1"/> <wire x1="46.2534" y1="20.954515625" x2="46.2534" y2="19.05" width="0.4064" layer="1"/>
    <wire x1="46.2534" y1="20.954515625" x2="46.227515625" y2="20.9804" width="0.4064" layer="1"/> <wire x1="46.2534" y1="20.954515625" x2="46.227515625" y2="20.9804" width="0.4064" layer="1"/>
    <wire x1="33.4712" y1="20.9804" x2="46.227515625" y2="20.9804" width="0.4064" layer="1"/> <wire x1="33.4712" y1="20.9804" x2="46.227515625" y2="20.9804" width="0.4064" layer="1"/>
    <wire x1="31.5214" y1="20.5998" x2="31.5214" y2="20.9804" width="0.4064" layer="1"/> <wire x1="31.5214" y1="20.5998" x2="31.5214" y2="20.9804" width="0.4064" layer="1"/>
    <wire x1="31.5214" y1="20.9804" x2="33.4712" y2="20.9804" width="0.4064" layer="1"/> <wire x1="31.5214" y1="20.9804" x2="33.4712" y2="20.9804" width="0.4064" layer="1"/>
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    <wire x1="51.2318" y1="17.9832" x2="51.2318" y2="15.494" width="0.4064" layer="1"/>
    <wire x1="50.292" y1="15.494" x2="50.51810625" y2="15.494" width="0" layer="19" extent="1-1"/>
    </signal> </signal>
    <signal name="SCK"> <signal name="SCK">
    <contactref element="U$1" pad="3"/> <contactref element="U$1" pad="3"/>
    ......
    FabFTDI.s#2 → Crystal version/FabFTDI.sch
    View file @ cf512432
    ...@@ -142,29 +142,6 @@ ...@@ -142,29 +142,6 @@
    <libraries> <libraries>
    <library name="fabPatil"> <library name="fabPatil">
    <packages> <packages>
    <package name="SOD123">
    <description>&lt;b&gt;SMALL OUTLINE DIODE&lt;/b&gt;</description>
    <wire x1="-2.973" y1="0.983" x2="2.973" y2="0.983" width="0.0508" layer="39"/>
    <wire x1="2.973" y1="-0.983" x2="-2.973" y2="-0.983" width="0.0508" layer="39"/>
    <wire x1="-2.973" y1="-0.983" x2="-2.973" y2="0.983" width="0.0508" layer="39"/>
    <wire x1="2.973" y1="0.983" x2="2.973" y2="-0.983" width="0.0508" layer="39"/>
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    <smd name="CATHODE" x="-1.7" y="0" dx="1.6" dy="0.8" layer="1"/>
    <smd name="ANODE" x="1.7" y="0" dx="1.6" dy="0.8" layer="1"/>
    <text x="-1.905" y="1.905" size="1.27" layer="25">&gt;NAME</text>
    <text x="-1.905" y="-0.635" size="1.27" layer="27">&gt;VALUE</text>
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    <package name="1206"> <package name="1206">
    <description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt; <description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;
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    ...@@ -418,18 +395,6 @@ For boards designed to be plugged directly into a USB slot. If possible, ensure ...@@ -418,18 +395,6 @@ For boards designed to be plugged directly into a USB slot. If possible, ensure
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    </packages> </packages>
    <symbols> <symbols>
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    </symbol>
    <symbol name="RESISTOR"> <symbol name="RESISTOR">
    <wire x1="-2.54" y1="0" x2="-2.159" y2="1.016" width="0.2032" layer="94"/> <wire x1="-2.54" y1="0" x2="-2.159" y2="1.016" width="0.2032" layer="94"/>
    <wire x1="-2.159" y1="1.016" x2="-1.524" y2="-1.016" width="0.2032" layer="94"/> <wire x1="-2.159" y1="1.016" x2="-1.524" y2="-1.016" width="0.2032" layer="94"/>
    ...@@ -539,23 +504,6 @@ For boards designed to be plugged directly into a USB slot. If possible, ensure ...@@ -539,23 +504,6 @@ For boards designed to be plugged directly into a USB slot. If possible, ensure
    </symbol> </symbol>
    </symbols> </symbols>
    <devicesets> <devicesets>
    <deviceset name="ZENER_DIODE" prefix="D" uservalue="yes">
    <description>zener diode</description>
    <gates>
    <gate name="1" symbol="ZENER" x="0" y="0"/>
    </gates>
    <devices>
    <device name="SOD123" package="SOD123">
    <connects>
    <connect gate="1" pin="ANODE" pad="ANODE"/>
    <connect gate="1" pin="CATHODE" pad="CATHODE"/>
    </connects>
    <technologies>
    <technology name=""/>
    </technologies>
    </device>
    </devices>
    </deviceset>
    <deviceset name="RESISTOR" prefix="R" uservalue="yes"> <deviceset name="RESISTOR" prefix="R" uservalue="yes">
    <gates> <gates>
    <gate name="G$1" symbol="RESISTOR" x="0" y="0"/> <gate name="G$1" symbol="RESISTOR" x="0" y="0"/>
    ...@@ -2144,11 +2092,8 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2144,11 +2092,8 @@ Source: 008-0260-0_E.pdf</description>
    <part name="P+1" library="FAB_Hello" deviceset="VCC" device=""/> <part name="P+1" library="FAB_Hello" deviceset="VCC" device=""/>
    <part name="GND1" library="FAB_Hello" deviceset="GND" device=""/> <part name="GND1" library="FAB_Hello" deviceset="GND" device=""/>
    <part name="GND2" library="FAB_Hello" deviceset="GND" device=""/> <part name="GND2" library="FAB_Hello" deviceset="GND" device=""/>
    <part name="D1" library="fabPatil" deviceset="ZENER_DIODE" device="SOD123" value="3.3V"/> <part name="R1" library="fabPatil" deviceset="RESISTOR" device="1206" value="499"/>
    <part name="D2" library="fabPatil" deviceset="ZENER_DIODE" device="SOD123" value="3.3V"/> <part name="R2" library="fabPatil" deviceset="RESISTOR" device="1206" value="499"/>
    <part name="GND3" library="FAB_Hello" deviceset="GND" device=""/>
    <part name="R1" library="fabPatil" deviceset="RESISTOR" device="1206" value="22"/>
    <part name="R2" library="fabPatil" deviceset="RESISTOR" device="1206" value="22"/>
    <part name="P+2" library="FAB_Hello" deviceset="VCC" device=""/> <part name="P+2" library="FAB_Hello" deviceset="VCC" device=""/>
    <part name="JP1" library="fabPatil" deviceset="FTDI_CONNECTOR" device="SMD" value="FTDI"/> <part name="JP1" library="fabPatil" deviceset="FTDI_CONNECTOR" device="SMD" value="FTDI"/>
    <part name="C1" library="fabPatil" deviceset="UNPOLARIZED_CAPACITOR" device="1206" value="0.1uF"/> <part name="C1" library="fabPatil" deviceset="UNPOLARIZED_CAPACITOR" device="1206" value="0.1uF"/>
    ...@@ -2185,9 +2130,6 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2185,9 +2130,6 @@ Source: 008-0260-0_E.pdf</description>
    <instance part="P+1" gate="VCC" x="-22.86" y="33.02" rot="R90"/> <instance part="P+1" gate="VCC" x="-22.86" y="33.02" rot="R90"/>
    <instance part="GND1" gate="1" x="-2.54" y="33.02" rot="R90"/> <instance part="GND1" gate="1" x="-2.54" y="33.02" rot="R90"/>
    <instance part="GND2" gate="1" x="-76.2" y="15.24" rot="R270"/> <instance part="GND2" gate="1" x="-76.2" y="15.24" rot="R270"/>
    <instance part="D1" gate="1" x="-66.04" y="-7.62" rot="R90"/>
    <instance part="D2" gate="1" x="-71.12" y="-7.62" rot="R90"/>
    <instance part="GND3" gate="1" x="-76.2" y="-15.24" rot="R270"/>
    <instance part="R1" gate="G$1" x="-60.96" y="2.54"/> <instance part="R1" gate="G$1" x="-60.96" y="2.54"/>
    <instance part="R2" gate="G$1" x="-53.34" y="0"/> <instance part="R2" gate="G$1" x="-53.34" y="0"/>
    <instance part="P+2" gate="VCC" x="-71.12" y="20.32"/> <instance part="P+2" gate="VCC" x="-71.12" y="20.32"/>
    ...@@ -2198,13 +2140,13 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2198,13 +2140,13 @@ Source: 008-0260-0_E.pdf</description>
    <instance part="R6" gate="G$1" x="35.56" y="10.16"/> <instance part="R6" gate="G$1" x="35.56" y="10.16"/>
    <instance part="P+3" gate="VCC" x="68.58" y="10.16"/> <instance part="P+3" gate="VCC" x="68.58" y="10.16"/>
    <instance part="GND5" gate="1" x="68.58" y="-7.62"/> <instance part="GND5" gate="1" x="68.58" y="-7.62"/>
    <instance part="U$1" gate="G$1" x="63.5" y="-25.4"/> <instance part="U$1" gate="G$1" x="55.88" y="-25.4"/>
    <instance part="P+5" gate="VCC" x="76.2" y="-15.24"/> <instance part="P+5" gate="VCC" x="68.58" y="-15.24"/>
    <instance part="GND6" gate="1" x="76.2" y="-33.02"/> <instance part="GND6" gate="1" x="68.58" y="-33.02"/>
    <instance part="C2" gate="1" x="-43.18" y="-5.08" rot="R180"/> <instance part="C2" gate="1" x="-43.18" y="-5.08" rot="R180"/>
    <instance part="IC1" gate="G$1" x="-12.7" y="-12.7"/> <instance part="IC1" gate="G$1" x="-12.7" y="-12.7"/>
    <instance part="P+4" gate="VCC" x="-38.1" y="22.86"/> <instance part="P+4" gate="VCC" x="-38.1" y="22.86"/>
    <instance part="GND4" gate="1" x="-48.26" y="-10.16"/> <instance part="GND4" gate="1" x="-50.8" y="-10.16"/>
    <instance part="GND8" gate="1" x="-38.1" y="-43.18"/> <instance part="GND8" gate="1" x="-38.1" y="-43.18"/>
    <instance part="R3" gate="G$1" x="-60.96" y="-22.86" rot="R90"/> <instance part="R3" gate="G$1" x="-60.96" y="-22.86" rot="R90"/>
    <instance part="P+6" gate="VCC" x="-60.96" y="-12.7"/> <instance part="P+6" gate="VCC" x="-60.96" y="-12.7"/>
    ...@@ -2234,16 +2176,6 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2234,16 +2176,6 @@ Source: 008-0260-0_E.pdf</description>
    <wire x1="-78.74" y1="7.62" x2="-73.66" y2="7.62" width="0.1524" layer="91"/> <wire x1="-78.74" y1="7.62" x2="-73.66" y2="7.62" width="0.1524" layer="91"/>
    </segment> </segment>
    <segment> <segment>
    <pinref part="D1" gate="1" pin="ANODE"/>
    <wire x1="-66.04" y1="-10.16" x2="-66.04" y2="-15.24" width="0.1524" layer="91"/>
    <pinref part="GND3" gate="1" pin="GND"/>
    <wire x1="-66.04" y1="-15.24" x2="-71.12" y2="-15.24" width="0.1524" layer="91"/>
    <pinref part="D2" gate="1" pin="ANODE"/>
    <wire x1="-71.12" y1="-15.24" x2="-73.66" y2="-15.24" width="0.1524" layer="91"/>
    <wire x1="-71.12" y1="-10.16" x2="-71.12" y2="-15.24" width="0.1524" layer="91"/>
    <junction x="-71.12" y="-15.24"/>
    </segment>
    <segment>
    <pinref part="JP1" gate="G$1" pin="GND"/> <pinref part="JP1" gate="G$1" pin="GND"/>
    <pinref part="GND5" gate="1" pin="GND"/> <pinref part="GND5" gate="1" pin="GND"/>
    <wire x1="45.72" y1="0" x2="68.58" y2="0" width="0.1524" layer="91"/> <wire x1="45.72" y1="0" x2="68.58" y2="0" width="0.1524" layer="91"/>
    ...@@ -2252,14 +2184,14 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2252,14 +2184,14 @@ Source: 008-0260-0_E.pdf</description>
    <segment> <segment>
    <pinref part="U$1" gate="G$1" pin="GND"/> <pinref part="U$1" gate="G$1" pin="GND"/>
    <pinref part="GND6" gate="1" pin="GND"/> <pinref part="GND6" gate="1" pin="GND"/>
    <wire x1="68.58" y1="-27.94" x2="76.2" y2="-27.94" width="0.1524" layer="91"/> <wire x1="60.96" y1="-27.94" x2="68.58" y2="-27.94" width="0.1524" layer="91"/>
    <wire x1="76.2" y1="-27.94" x2="76.2" y2="-30.48" width="0.1524" layer="91"/> <wire x1="68.58" y1="-27.94" x2="68.58" y2="-30.48" width="0.1524" layer="91"/>
    </segment> </segment>
    <segment> <segment>
    <pinref part="C2" gate="1" pin="2"/> <pinref part="C2" gate="1" pin="2"/>
    <pinref part="GND4" gate="1" pin="GND"/> <pinref part="GND4" gate="1" pin="GND"/>
    <wire x1="-45.72" y1="-5.08" x2="-48.26" y2="-5.08" width="0.1524" layer="91"/> <wire x1="-45.72" y1="-5.08" x2="-50.8" y2="-5.08" width="0.1524" layer="91"/>
    <wire x1="-48.26" y1="-5.08" x2="-48.26" y2="-7.62" width="0.1524" layer="91"/> <wire x1="-50.8" y1="-5.08" x2="-50.8" y2="-7.62" width="0.1524" layer="91"/>
    </segment> </segment>
    <segment> <segment>
    <pinref part="GND8" gate="1" pin="GND"/> <pinref part="GND8" gate="1" pin="GND"/>
    ...@@ -2310,8 +2242,8 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2310,8 +2242,8 @@ Source: 008-0260-0_E.pdf</description>
    <segment> <segment>
    <pinref part="U$1" gate="G$1" pin="VCC"/> <pinref part="U$1" gate="G$1" pin="VCC"/>
    <pinref part="P+5" gate="VCC" pin="VCC"/> <pinref part="P+5" gate="VCC" pin="VCC"/>
    <wire x1="68.58" y1="-22.86" x2="76.2" y2="-22.86" width="0.1524" layer="91"/> <wire x1="60.96" y1="-22.86" x2="68.58" y2="-22.86" width="0.1524" layer="91"/>
    <wire x1="76.2" y1="-22.86" x2="76.2" y2="-17.78" width="0.1524" layer="91"/> <wire x1="68.58" y1="-22.86" x2="68.58" y2="-17.78" width="0.1524" layer="91"/>
    </segment> </segment>
    <segment> <segment>
    <pinref part="IC1" gate="G$1" pin="VCC"/> <pinref part="IC1" gate="G$1" pin="VCC"/>
    ...@@ -2335,23 +2267,15 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2335,23 +2267,15 @@ Source: 008-0260-0_E.pdf</description>
    </net> </net>
    <net name="N$2" class="0"> <net name="N$2" class="0">
    <segment> <segment>
    <wire x1="-78.74" y1="2.54" x2="-71.12" y2="2.54" width="0.1524" layer="91"/> <wire x1="-78.74" y1="2.54" x2="-66.04" y2="2.54" width="0.1524" layer="91"/>
    <pinref part="D2" gate="1" pin="CATHODE"/>
    <wire x1="-71.12" y1="-5.08" x2="-71.12" y2="2.54" width="0.1524" layer="91"/>
    <pinref part="R1" gate="G$1" pin="1"/> <pinref part="R1" gate="G$1" pin="1"/>
    <wire x1="-71.12" y1="2.54" x2="-66.04" y2="2.54" width="0.1524" layer="91"/>
    <junction x="-71.12" y="2.54"/>
    <pinref part="JP2" gate="G$1" pin="D-"/> <pinref part="JP2" gate="G$1" pin="D-"/>
    </segment> </segment>
    </net> </net>
    <net name="N$1" class="0"> <net name="N$1" class="0">
    <segment> <segment>
    <pinref part="D1" gate="1" pin="CATHODE"/> <wire x1="-78.74" y1="0" x2="-58.42" y2="0" width="0.1524" layer="91"/>
    <wire x1="-66.04" y1="-5.08" x2="-66.04" y2="0" width="0.1524" layer="91"/>
    <wire x1="-78.74" y1="0" x2="-66.04" y2="0" width="0.1524" layer="91"/>
    <pinref part="R2" gate="G$1" pin="1"/> <pinref part="R2" gate="G$1" pin="1"/>
    <wire x1="-58.42" y1="0" x2="-66.04" y2="0" width="0.1524" layer="91"/>
    <junction x="-66.04" y="0"/>
    <pinref part="JP2" gate="G$1" pin="D+"/> <pinref part="JP2" gate="G$1" pin="D+"/>
    </segment> </segment>
    </net> </net>
    ...@@ -2372,8 +2296,8 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2372,8 +2296,8 @@ Source: 008-0260-0_E.pdf</description>
    <net name="MOSI" class="0"> <net name="MOSI" class="0">
    <segment> <segment>
    <pinref part="U$1" gate="G$1" pin="MOSI"/> <pinref part="U$1" gate="G$1" pin="MOSI"/>
    <wire x1="68.58" y1="-25.4" x2="76.2" y2="-25.4" width="0.1524" layer="91"/> <wire x1="60.96" y1="-25.4" x2="68.58" y2="-25.4" width="0.1524" layer="91"/>
    <label x="73.66" y="-25.4" size="1.778" layer="95"/> <label x="66.04" y="-25.4" size="1.778" layer="95"/>
    </segment> </segment>
    <segment> <segment>
    <pinref part="IC1" gate="G$1" pin="PB2(PDI/MOSI/PCINT2)"/> <pinref part="IC1" gate="G$1" pin="PB2(PDI/MOSI/PCINT2)"/>
    ...@@ -2384,8 +2308,8 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2384,8 +2308,8 @@ Source: 008-0260-0_E.pdf</description>
    <net name="RST" class="0"> <net name="RST" class="0">
    <segment> <segment>
    <pinref part="U$1" gate="G$1" pin="RST"/> <pinref part="U$1" gate="G$1" pin="RST"/>
    <wire x1="60.96" y1="-27.94" x2="53.34" y2="-27.94" width="0.1524" layer="91"/> <wire x1="53.34" y1="-27.94" x2="45.72" y2="-27.94" width="0.1524" layer="91"/>
    <label x="50.8" y="-27.94" size="1.778" layer="95"/> <label x="43.18" y="-27.94" size="1.778" layer="95"/>
    </segment> </segment>
    <segment> <segment>
    <pinref part="IC1" gate="G$1" pin="/RESET(PC1)"/> <pinref part="IC1" gate="G$1" pin="/RESET(PC1)"/>
    ...@@ -2398,8 +2322,8 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2398,8 +2322,8 @@ Source: 008-0260-0_E.pdf</description>
    <net name="SCK" class="0"> <net name="SCK" class="0">
    <segment> <segment>
    <pinref part="U$1" gate="G$1" pin="SCK"/> <pinref part="U$1" gate="G$1" pin="SCK"/>
    <wire x1="60.96" y1="-25.4" x2="53.34" y2="-25.4" width="0.1524" layer="91"/> <wire x1="53.34" y1="-25.4" x2="45.72" y2="-25.4" width="0.1524" layer="91"/>
    <label x="50.8" y="-25.4" size="1.778" layer="95"/> <label x="43.18" y="-25.4" size="1.778" layer="95"/>
    </segment> </segment>
    <segment> <segment>
    <pinref part="IC1" gate="G$1" pin="PB1(SCK/PCINT1)"/> <pinref part="IC1" gate="G$1" pin="PB1(SCK/PCINT1)"/>
    ...@@ -2410,8 +2334,8 @@ Source: 008-0260-0_E.pdf</description> ...@@ -2410,8 +2334,8 @@ Source: 008-0260-0_E.pdf</description>
    <net name="MISO" class="0"> <net name="MISO" class="0">
    <segment> <segment>
    <pinref part="U$1" gate="G$1" pin="MISO"/> <pinref part="U$1" gate="G$1" pin="MISO"/>
    <wire x1="60.96" y1="-22.86" x2="53.34" y2="-22.86" width="0.1524" layer="91"/> <wire x1="53.34" y1="-22.86" x2="45.72" y2="-22.86" width="0.1524" layer="91"/>
    <label x="50.8" y="-22.86" size="1.778" layer="95"/> <label x="43.18" y="-22.86" size="1.778" layer="95"/>
    </segment> </segment>
    <segment> <segment>
    <pinref part="IC1" gate="G$1" pin="PB3(PDO/MISO/PCINT3)"/> <pinref part="IC1" gate="G$1" pin="PB3(PDO/MISO/PCINT3)"/>
    ......
    Crystal version/eagle.epf 0 → 100755
    View file @ cf512432
    [Eagle]
    Version="08 03 02"
    Platform="Windows"
    Globals="Globals"
    Desktop="Desktop"
    [Globals]
    AutoSaveProject=1
    UsedLibraryUrn="urn:adsk.eagle:library:105"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/FAB_Hello.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/fab.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/fabPatil.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/ng.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/usb_con-update.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/Adafruit/adafruit.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/LilyPad-Wearables.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Aesthetics.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-AnalogIC.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Boards.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Capacitors.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Connectors.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-DigitalIC.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-DiscreteSemi.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Displays.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Electromechanical.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-FreqCtrl.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-LED.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Passives.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-PowerIC.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-RF.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Resistors.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Retired.lbr"
    UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Sensors.lbr"
    [Win_1]
    Type="Schematic Editor"
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    State=1
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    PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
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