Commit c6be87d9 authored by Erik Strand's avatar Erik Strand

Enable free-running mode

parent e9a40fad
...@@ -47,8 +47,9 @@ void bm_initADC(void) { ...@@ -47,8 +47,9 @@ void bm_initADC(void) {
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( GCM_ADC ) | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN ; GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( GCM_ADC ) | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN ;
while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY ); while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY );
ADC->CTRLB.reg = ADC_CTRLB_PRESCALER_DIV512 | // Divide Clock by 512. ADC->CTRLB.reg = ADC_CTRLB_PRESCALER_DIV512 // Divide Clock by 512.
ADC_CTRLB_RESSEL_10BIT; // 10 bits resolution as default | ADC_CTRLB_RESSEL_10BIT // 10 bits resolution as default
| ADC_CTRLB_FREERUN;
syncADC(); // Wait for synchronization of registers between the clock domains syncADC(); // Wait for synchronization of registers between the clock domains
// Setting configuration // Setting configuration
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment