Commit 2952b258 authored by Zach Fredin's avatar Zach Fredin

added bare metal instructions and files

parent 0afc41a0
......@@ -36,3 +36,101 @@ To write code and load it, I use [PlatformIO](https://platformio.org/platformio-
One of the troubles with Arduino is that people forget that it is just a big C++ library. This means that everything under the sun (that compiles) is legal here. *That* means that we can use Arduino as a crutch, but write really nice Special Function Register code inside of the same executable. Great!
Indeed, in the PlatformIO environment, we even have wonderful autocomplete handles on the D51's core register map. For some examples of this kind of manipulation, check out the `hunks` in the [ponyo](https://gitlab.cba.mit.edu/squidworks/ponyo) project.
### Bare Metal development
Okay, bare-ish metal development. If you want to work with the SAMD51 using the command line, a text editor, Makefiles, and a few open-source tools, it's possible to do so with a bit of setup. You should use Linux to do this work; your mileage may vary on other operating systems.
Credit to Alex Kaspar for sorting through openocd setup in 2018. These instructions build on that work.
First, install [openocd](http://openocd.org/getting-openocd/). Until recently, this tool didn't officially support the SAMD51 series, requiring the use of a [patch](http://openocd.zylin.com/#/c/4272/) and manual compilation to work with the chipset. According to the patch notes, the patch was merged in early 2019 so the standard installation should work fine. Put the program in directory such as ~/openocd. If you're building from source, navigate to this directory and run:
```
./bootstrap
./configure --enable-cmsis-dap
make
make install
```
Second, install a handful of other helpful tools. Depending on your other work you may already have many of these on your machine:
```
sudo apt install autoconf build-essential cmake gdb-arm-none-eabi libtool libtool-bin libhidapi-dev libusb-dev libusb-1.0-0-dev pkg-config
```
Third, clone this repo. Navigate to the `baremetal` directory and run `make`. You should see something like this result:
```
zach@crudite:~/Documents/atsamd51/baremetal$ make
Building file: main.c
ARM/GNU C Compiler
"arm-none-eabi-gcc" -x c -DDEBUG -Os -ffunction-sections -g3 -Wall -c -std=gnu99 -mthumb -mabi=aapcs-linux -mlong-calls -mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DSAMD51 -D__SAMD51J19A__ -I"samd51" -I"samd51/CMSIS/Include" -I"samd51/include" -I"samd51/startup" \
-MD -MP -MF "main.d" -MT"main.d" -MT"main.o" -o "main.o" "main.c"
Finished building: main.c
Building file: samd51/startup/system_samd51.c
ARM/GNU C Compiler
"arm-none-eabi-gcc" -x c -DDEBUG -Os -ffunction-sections -g3 -Wall -c -std=gnu99 -mthumb -mabi=aapcs-linux -mlong-calls -mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DSAMD51 -D__SAMD51J19A__ -I"samd51" -I"samd51/CMSIS/Include" -I"samd51/include" -I"samd51/startup" \
-MD -MP -MF "samd51/startup/system_samd51.d" -MT"samd51/startup/system_samd51.d" -MT"samd51/startup/system_samd51.o" -o "samd51/startup/system_samd51.o" "samd51/startup/system_samd51.c"
Finished building: samd51/startup/system_samd51.c
Building file: samd51/startup/startup_samd51.c
ARM/GNU C Compiler
"arm-none-eabi-gcc" -x c -DDEBUG -Os -ffunction-sections -g3 -Wall -c -std=gnu99 -mthumb -mabi=aapcs-linux -mlong-calls -mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DSAMD51 -D__SAMD51J19A__ -I"samd51" -I"samd51/CMSIS/Include" -I"samd51/include" -I"samd51/startup" \
-MD -MP -MF "samd51/startup/startup_samd51.d" -MT"samd51/startup/startup_samd51.d" -MT"samd51/startup/startup_samd51.o" -o "samd51/startup/startup_samd51.o" "samd51/startup/startup_samd51.c"
Finished building: samd51/startup/startup_samd51.c
Building target: main.elf
Invoking: ARM/GNU Linker
"arm-none-eabi-gcc" -o main.elf main.o samd51/startup/system_samd51.o samd51/startup/startup_samd51.o -Wl,--start-group -lm -Wl,--end-group -mthumb -mabi=aapcs-linux -mlong-calls -mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DSAMD51 \
-Wl,-Map="main.map" --specs=nano.specs -Wl,--gc-sections \
\
\
-T"samd51/startup/samd51j19a_flash.ld" \
-L"samd51/startup"
/usr/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/bin/ld: warning: main.o uses 32-bit enums yet the output is to use variable-size enums; use of enum values across objects may fail
/usr/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/bin/ld: warning: samd51/startup/system_samd51.o uses 32-bit enums yet the output is to use variable-size enums; use of enum values across objects may fail
/usr/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/bin/ld: warning: samd51/startup/startup_samd51.o uses 32-bit enums yet the output is to use variable-size enums; use of enum values across objects may fail
Finished building target: main.elf
"arm-none-eabi-objcopy" -O binary "main.elf" "main.bin"
"arm-none-eabi-objcopy" -O ihex -R .eeprom -R .fuse -R .lock -R .signature \
"main.elf" "main.hex"
"arm-none-eabi-objcopy" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma \
.eeprom=0 --no-change-warnings -O binary "main.elf" \
"main.eep" || exit 0
"arm-none-eabi-objdump" -h -S "main.elf" > "main.lss"
"arm-none-eabi-size" "main.elf"
text data bss dec hex filename
968 0 49184 50152 c3e8 main.elf
Deleting intermediate files...
rm -f main.o samd51/startup/system_samd51.o samd51/startup/startup_samd51.o
rm -f main.d samd51/startup/system_samd51.d samd51/startup/startup_samd51.d
rm -f main.a main.hex main.bin \
main.lss main.eep main.map \
main.srec
```
Errors are not uncommon and are usually related to the directory structure of the Makefile. However, this repo includes all of the required SAMD51 libraries (from Atmel/Microchip's ASF4 framework, as shared by [Adafruit](https://github.com/adafruit/asf4)), so if you grabbed the entire repo you should be fine. Post an issue if it doesn't work. Note one modification to the Makefile is that it deletes all the intermediate files (.o, .eep, etc) after producing the .elf file. If you want them, remove the lines in the Makefile after the phrase 'Deleting intermediate files...'.
Fourth, after you have your .elf file (in this case `main.elf`), connect your target board to power and an Atmel ICE programmer (make sure you use the correct pinout and the SAM port!) and run `openocd`. You should see the following:
```
zach@crudite:~/Documents/atsamd51/baremetal$ openocd
Open On-Chip Debugger 0.10.0+dev-00409-g1ae106de-dirty (2019-10-14-20:41)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
none separate
adapter speed: 400 kHz
cortex_m reset_config sysresetreq
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: JTAG Supported
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : CMSIS-DAP: FW Version = 1.0
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : clock speed 400 kHz
Info : SWD DPIDR 0x2ba01477
Info : at91samd51j18.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : Listening on port 3333 for gdb connections
```
If you see `Error: unable to open CMSIS-DAP device 0x3eb:0x2141`, it probably means openocd needs root privileges to access the programmer. You could run `sudo openocd`, but a better solution is to follow the instructions [here](https://forgge.github.io/theCore/guides/running-openocd-without-sudo.html) to create a new rule. Don't forget to restart `udev` after doing this with `sudo udevadm trigger`.
Fifth, now that openocd is running, open a second terminal window and type `arm-none-eabi-gdb main.elf`. When gdb opens, type `tar ext :3333` (a shortcut for `target extended-remote :3333`), then `load`. This should flash the microcontroller with the new code, at which point you can exit gdb with `quit` and `y`. In the openocd window, close the connection with `Ctrl-C`. If you're flashing one of Jake's moduleboards, the red and green LEDs should alternate fast enough to create a line of dashes when you wave the board around:
![example-blinks](baremetal/example-blinks.jpg)
# how we make directories
MK_DIR = mkdir -p
# Programming tool
OPENOCD = openocd
# Target Chip
MCU_DEFINE := __SAMD51J19A__
# Flags
LFLAGS += -mthumb -mabi=aapcs-linux -mlong-calls -mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DSAMD51
CFLAGS += -x c -DDEBUG -Os -ffunction-sections -g3 -Wall -c -std=gnu99 $(LFLAGS)
INCLUDES += -I"samd51" -I"samd51/CMSIS/Include" -I"samd51/include" -I"samd51/startup"
# List the subdirectories for creating object files
SUB_DIRS += \
\
samd51/CMSIS/Include \
samd51/include \
samd51/startup \
# List the source files
SRCS = $(wildcard *.c)
SRCS += $(wildcard samd51/startup/*.c)
# List the object files
OBJS += $(SRCS:%.c=%.o)
OBJS := $(OBJS:../%=%) # detach path
OBJS_AS_ARGS += $(OBJS)
# List the dependency files
DEPS := $(OBJS:%.o=%.d)
DEPS_AS_ARGS += $(DEPS)
OUTPUT_FILE_NAME :=main
QUOTE := "
OUTPUT_FILE_PATH +=$(OUTPUT_FILE_NAME).elf
OUTPUT_FILE_PATH_AS_ARGS +=$(OUTPUT_FILE_NAME).elf
vpath %.c ..
vpath %.s ..
vpath %.S ..
# All Target
all: $(SUB_DIRS) $(OUTPUT_FILE_PATH)
# Linker target
$(OUTPUT_FILE_PATH): $(OBJS)
@echo Building target: $@
@echo Invoking: ARM/GNU Linker
$(QUOTE)arm-none-eabi-gcc$(QUOTE) -o $(OUTPUT_FILE_NAME).elf $(OBJS_AS_ARGS) -Wl,--start-group -lm -Wl,--end-group $(LFLAGS) \
-Wl,-Map="$(OUTPUT_FILE_NAME).map" --specs=nano.specs -Wl,--gc-sections \
\
\
-T"samd51/startup/samd51j19a_flash.ld" \
-L"samd51/startup"
@echo Finished building target: $@
"arm-none-eabi-objcopy" -O binary "$(OUTPUT_FILE_NAME).elf" "$(OUTPUT_FILE_NAME).bin"
"arm-none-eabi-objcopy" -O ihex -R .eeprom -R .fuse -R .lock -R .signature \
"$(OUTPUT_FILE_NAME).elf" "$(OUTPUT_FILE_NAME).hex"
"arm-none-eabi-objcopy" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma \
.eeprom=0 --no-change-warnings -O binary "$(OUTPUT_FILE_NAME).elf" \
"$(OUTPUT_FILE_NAME).eep" || exit 0
"arm-none-eabi-objdump" -h -S "$(OUTPUT_FILE_NAME).elf" > "$(OUTPUT_FILE_NAME).lss"
"arm-none-eabi-size" "$(OUTPUT_FILE_NAME).elf"
@echo Deleting intermediate files...
rm -f $(OBJS_AS_ARGS)
rm -f $(DEPS_AS_ARGS)
rm -f $(OUTPUT_FILE_NAME).a $(OUTPUT_FILE_NAME).hex $(OUTPUT_FILE_NAME).bin \
$(OUTPUT_FILE_NAME).lss $(OUTPUT_FILE_NAME).eep $(OUTPUT_FILE_NAME).map \
$(OUTPUT_FILE_NAME).srec
# Compiler targets
%.o: %.c
@echo Building file: $<
@echo ARM/GNU C Compiler
$(QUOTE)arm-none-eabi-gcc$(QUOTE) $(CFLAGS) -D$(MCU_DEFINE) $(INCLUDES) \
-MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
@echo Finished building: $<
# Detect changes in the dependent files and recompile the respective object files.
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(DEPS)),)
-include $(DEPS)
endif
endif
$(SUB_DIRS):
$(MK_DIR) "$@"
clean:
rm -f $(OBJS_AS_ARGS)
rm -f $(OUTPUT_FILE_PATH)
rm -f $(DEPS_AS_ARGS)
rm -f $(OUTPUT_FILE_NAME).a $(OUTPUT_FILE_NAME).hex $(OUTPUT_FILE_NAME).bin \
$(OUTPUT_FILE_NAME).lss $(OUTPUT_FILE_NAME).eep $(OUTPUT_FILE_NAME).map \
$(OUTPUT_FILE_NAME).srec
#include "sam.h"
int main (void) {
int i;
while(1) {
REG_PORT_DIR0 |= (1<<17);
REG_PORT_DIR0 &= ~(1<<19);
for (i=0;i<10000;i++) {
__asm("nop");
}
REG_PORT_DIR0 &= ~(1<<17);
REG_PORT_DIR0 |= (1<<19);
for (i=0;i<10000;i++) {
__asm("nop");
}
}
}
# Atmel-ICE JTAG/SWD in-circuit debugger.
interface cmsis-dap
transport select swd
# Chip info
set CHIPNAME at91samd51j18
source [find target/atsame5x.cfg]
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<title>CMSIS-CORE: Overview</title>
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<div id="projectname">CMSIS-CORE
&#160;<span id="projectnumber">Version 5.0.1</span>
</div>
<div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div>
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<div class="textblock"><p>CMSIS-CORE implements the basic run-time system for a Cortex-M device and gives the user access to the processor core and the device peripherals. In detail it defines:</p>
<ul>
<li><b>Hardware Abstraction Layer (HAL)</b> for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.</li>
<li><b>System exception names</b> to interface to system exceptions without having compatibility issues.</li>
<li><b>Methods to organize header files</b> that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.</li>
<li><b>Methods for system initialization</b> to be used by each MCU vendor. For example, the standardized <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system. ">SystemInit()</a> function is essential for configuring the clock system of the device.</li>
<li><b>Intrinsic functions</b> used to generate CPU instructions that are not supported by standard C functions.</li>
<li>A variable to determine the <b>system clock frequency</b> which simplifies the setup the SysTick timer.</li>
</ul>
<p>The following sections provide details about the CMSIS-CORE:</p>
<ul>
<li><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a> describes the project setup and shows a simple program example.</li>
<li><a class="el" href="using_TrustZone_pg.html">Using TrustZone&reg; for ARMv8-M</a> describes how to use the security extensions available in the ARMv8-M architecture.</li>
<li><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> describes the files of the CMSIS-CORE in detail and explains how to adapt template files provided by ARM to silicon vendor devices.</li>
<li><a class="el" href="coreMISRA_Exceptions_pg.html">MISRA-C Deviations</a> describes the violations to the MISRA standard.</li>
<li><a href="Modules.html"><b>Reference</b> </a> describe the features and functions of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in detail.</li>
<li><a href="Annotated.html"><b>Data</b> <b>Structures</b> </a> describe the data structures of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in detail.</li>
</ul>
<hr/>
<h2>CMSIS-CORE in ARM::CMSIS Pack </h2>
<p>Files relevant to CMSIS-CORE are present in the following <b>ARM::CMSIS</b> directories: </p>
<table class="doxtable">
<tr>
<th>File/Folder </th><th>Content </th></tr>
<tr>
<td><b>CMSIS\Documentation\Core</b> </td><td>This documentation </td></tr>
<tr>
<td><b>CMSIS\Include</b> </td><td>CMSIS-CORE header files (for example core_cm3.h, core_cmInstr.h, etc.) </td></tr>
<tr>
<td><b>Device</b> </td><td><a class="el" href="using_ARM_pg.html">ARM reference implementations</a> of Cortex-M devices </td></tr>
<tr>
<td><b>Device\_Template_Vendor</b> </td><td><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> for extension by silicon vendors </td></tr>
</table>
<hr/>
<h1><a class="anchor" id="ref_v6-v8M"></a>
Processor Support</h1>
<p>CMSIS supports the complete range of <a href="http://www.arm.com/products/processors/cortex-m/index.php" target="_blank"><b>Cortex-M processors</b></a> (with exception of Cortex-M1) and the <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" target="_blank"><b>ARMv8-M architecture</b></a> including security extensions.</p>
<h2><a class="anchor" id="ref_man_sec"></a>
Cortex-M Reference Manuals</h2>
<p>The Cortex-M Reference Manuals are generic user guides for devices that implement the various ARM Cortex-M processors. These manuals contain the programmers model and detailed information about the core peripherals.</p>
<ul>
<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/DUI0497A_cortex_m0_r0p0_generic_ug.pdf" target="_blank"><b>Cortex-M0 Devices Generic User Guide</b></a> (ARMv6-M architecture)</li>
<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/DUI0662B_cortex_m0p_r0p1_dgug.pdf" target="_blank"><b>Cortex-M0+ Devices Generic User Guide</b></a> (ARMv6-M architecture)</li>
<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/DUI0552A_cortex_m3_dgug.pdf" target="_blank"><b>Cortex-M3 Devices Generic User Guide</b></a> (ARMv7-M architecture)</li>
<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/DUI0553A_cortex_m4_dgug.pdf" target="_blank"><b>Cortex-M4 Devices Generic User Guide</b></a> (ARMv7-M architecture)</li>
<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646a/DUI0646A_cortex_m7_dgug.pdf" target="_blank"><b>Cortex-M7 Devices Generic User Guide</b></a> (ARMv7-M architecture)</li>
</ul>
<p>Reference manuals for <b>Cortex-M23</b> and <b>Cortex-M33</b> where not available at the time of release.</p>
<h2><a class="anchor" id="ARMv8M"></a>
ARMv8-M Architecture</h2>
<p>ARMv8-M introduces two profiles <b>Baseline</b> (for power and area constrained applications) and <b>Mainline</b> (full-featured with optional SIMD, floating-point, and co-processor extensions). Both ARMv8-M profiles are supported by CMSIS.</p>
<p>The ARMv8-M Architecture is described in the <a href="http://developer.arm.com/products/architecture/m-profile/docs/ddi0553/latest/armv8-m-architecture-reference-manual" target="_blank"><b>ARMv8-M Architecture Reference Manual</b></a>.</p>
<hr/>
<h1><a class="anchor" id="tested_tools_sec"></a>
Tested and Verified Toolchains</h1>
<p>The CMSIS-CORE <a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> supplied by ARM have been tested and verified with the following toolchains:</p>
<ul>
<li>ARM: ARM Compiler V5.6</li>
<li>ARM: ARM Compiler V6.6 (for Cortex-M23, Cortex-M33, ARMv8-M)</li>
<li>GNU: GNU Tools ARM Embedded 5.4 2016q3</li>
<li>IAR: IAR Embedded Workbench Kickstart Edition V6.10</li>
</ul>
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/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_common_tables.h
* Description: Extern declaration for common tables
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef _ARM_COMMON_TABLES_H
#define _ARM_COMMON_TABLES_H
#include "arm_math.h"
extern const uint16_t armBitRevTable[1024];
extern const q15_t armRecipTableQ15[64];
extern const q31_t armRecipTableQ31[64];
extern const float32_t twiddleCoef_16[32];
extern const float32_t twiddleCoef_32[64];
extern const float32_t twiddleCoef_64[128];
extern const float32_t twiddleCoef_128[256];
extern const float32_t twiddleCoef_256[512];
extern const float32_t twiddleCoef_512[1024];
extern const float32_t twiddleCoef_1024[2048];
extern const float32_t twiddleCoef_2048[4096];
extern const float32_t twiddleCoef_4096[8192];
#define twiddleCoef twiddleCoef_4096
extern const q31_t twiddleCoef_16_q31[24];
extern const q31_t twiddleCoef_32_q31[48];
extern const q31_t twiddleCoef_64_q31[96];
extern const q31_t twiddleCoef_128_q31[192];
extern const q31_t twiddleCoef_256_q31[384];
extern const q31_t twiddleCoef_512_q31[768];
extern const q31_t twiddleCoef_1024_q31[1536];
extern const q31_t twiddleCoef_2048_q31[3072];
extern const q31_t twiddleCoef_4096_q31[6144];
extern const q15_t twiddleCoef_16_q15[24];
extern const q15_t twiddleCoef_32_q15[48];
extern const q15_t twiddleCoef_64_q15[96];
extern const q15_t twiddleCoef_128_q15[192];
extern const q15_t twiddleCoef_256_q15[384];
extern const q15_t twiddleCoef_512_q15[768];
extern const q15_t twiddleCoef_1024_q15[1536];
extern const q15_t twiddleCoef_2048_q15[3072];
extern const q15_t twiddleCoef_4096_q15[6144];
extern const float32_t twiddleCoef_rfft_32[32];
extern const float32_t twiddleCoef_rfft_64[64];
extern const float32_t twiddleCoef_rfft_128[128];
extern const float32_t twiddleCoef_rfft_256[256];
extern const float32_t twiddleCoef_rfft_512[512];
extern const float32_t twiddleCoef_rfft_1024[1024];
extern const float32_t twiddleCoef_rfft_2048[2048];
extern const float32_t twiddleCoef_rfft_4096[4096];
/* floating-point bit reversal tables */
#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
/* fixed-point bit reversal tables */
#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
/* Tables for Fast Math Sine and Cosine */
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
#endif /* ARM_COMMON_TABLES_H */
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_const_structs.h
* Description: Constant structs that are initialized for user convenience.
* For example, some can be given as arguments to the arm_cfft_f32() function.
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.