Commit 01c14135 authored by Alexandre Kaspar's avatar Alexandre Kaspar

Fuse table

parent 988a56ba
Pipeline #4519 passed with stage
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......@@ -330,9 +330,22 @@ Let's deconstruct that:
`0x5E` is, in binary `01011110`, and the bits start (0-indexed) from the right (least significant bit).
The last four bits are about the clock selection, and their default `0010` stands for the 8MHz internal RC oscillator as source of the clock.
Or in a table:
In our program above, we're using `1110`, which we can understand by looking at the section on the clock (chapter 6, notably [page 24](http://fab.cba.mit.edu/classes/863.09/people/ryan/week5/ATtiny44%20Data%20Sheet.pdf#page=24)):
| `CKDIV8` | 0 |
| -------- | - |
| `CKOUT` | 1 |
| `SUT1` | 0 |
| `SUT0` | 1 |
| `CKSEL3` | 1 |
| `CKSEL2` | 1 |
| `CKSEL1` | 1 |
| `CKSEL0` | 0 |
The last four bits are about the clock selection, and their default value `0010` stands for the 8MHz internal RC oscillator as source of the clock.
In our program above, we're using `1110`, which we can understand by looking at the section on the clock (chapter 6, notably [page 24](http://fab.cba.mit.edu/classes/863.09/people/ryan/week5/ATtiny44%20Data%20Sheet.pdf#page=24), or just *search* for the fuse names):
<img src="images/att44_cksel.png" width="400">
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