Commit 1fa27139 authored by Dean Camera's avatar Dean Camera
Browse files

Split out NVM access code in the AVRISP project into a seperate NVMTarget.c...

Split out NVM access code in the AVRISP project into a seperate NVMTarget.c source file and header. Make NVM register accesses use the NVM base address as set by the host, rather than using the fixed value from the XMEGA datasheet.
parent 66482341
This diff is collapsed.
......@@ -28,8 +28,6 @@
this software.
*/
#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)
/** \file
*
* ISP Protocol handler, to process V2 Protocol wrapped ISP commands used in Atmel programmer devices.
......@@ -37,6 +35,8 @@
#include "ISPProtocol.h"
#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)
/** Handler for the CMD_ENTER_PROGMODE_ISP command, which attempts to enter programming mode on
* the attached device, returning success or failure back to the host.
*/
......
......@@ -42,8 +42,8 @@
#include "V2Protocol.h"
/* Preprocessor Checks: */
#if (BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1)
#undef ENABLE_ISP_PROTOCOL
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
#undef ENABLE_ISP_PROTOCOL
#if !defined(ENABLE_PDI_PROTOCOL)
#define ENABLE_PDI_PROTOCOL
......
......@@ -28,8 +28,6 @@
this software.
*/
#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)
/** \file
*
* Target-related functions for the ISP Protocol decoder.
......@@ -37,6 +35,8 @@
#include "ISPTarget.h"
#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)
/** Converts the given AVR Studio SCK duration parameter (set by a SET PARAM command from the host) to the nearest
* possible SPI clock prescaler mask for passing to the SPI_Init() routine.
*
......
......@@ -48,8 +48,8 @@
#include "V2ProtocolParams.h"
/* Preprocessor Checks: */
#if (BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1)
#undef ENABLE_ISP_PROTOCOL
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
#undef ENABLE_ISP_PROTOCOL
#if !defined(ENABLE_PDI_PROTOCOL)
#define ENABLE_PDI_PROTOCOL
......
/*
LUFA Library
Copyright (C) Dean Camera, 2009.
dean [at] fourwalledcubicle [dot] com
www.fourwalledcubicle.com
*/
/*
Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, and distribute this software
and its documentation for any purpose and without fee is hereby
granted, provided that the above copyright notice appear in all
copies and that both that the copyright notice and this
permission notice and warranty disclaimer appear in supporting
documentation, and that the name of the author not be used in
advertising or publicity pertaining to distribution of the
software without specific, written prior permission.
The author disclaim all warranties with regard to this
software, including all implied warranties of merchantability
and fitness. In no event shall the author be liable for any
special, indirect or consequential damages or any damages
whatsoever resulting from loss of use, data or profits, whether
in an action of contract, negligence or other tortious action,
arising out of or in connection with the use or performance of
this software.
*/
/** \file
*
* Target-related functions for the target's NVM module.
*/
#define INCLUDE_FROM_NVMTARGET_C
#include "NVMTarget.h"
#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
void NVMTarget_SendNVMRegAddress(uint8_t Register)
{
uint32_t Address = XPROG_Param_NVMBase | Register;
PDITarget_SendByte(Address >> 24);
PDITarget_SendByte(Address >> 26);
PDITarget_SendByte(Address >> 8);
PDITarget_SendByte(Address & 0xFF);
}
bool NVMTarget_WaitWhileNVMBusBusy(void)
{
uint8_t AttemptsRemaining = 255;
/* Poll the STATUS register to check to see if NVM access has been enabled */
while (AttemptsRemaining--)
{
PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
return true;
}
return false;
}
void NVMTarget_WaitWhileNVMControllerBusy(void)
{
/* Poll the NVM STATUS register while the NVM controller is busy */
for (;;)
{
PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_1BYTE << 2));
NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);
if (!(PDITarget_ReceiveByte() & (1 << 7)))
return;
}
}
uint32_t NVMTarget_GetMemoryCRC(uint8_t MemoryCommand)
{
uint32_t MemoryCRC;
/* Set the NVM command to the correct CRC read command */
PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
PDITarget_SendByte(MemoryCommand);
/* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);
PDITarget_SendByte(1 << 0);
/* Wait until the NVM bus and controller is no longer busy */
NVMTarget_WaitWhileNVMBusBusy();
NVMTarget_WaitWhileNVMControllerBusy();
/* Read the three byte generated CRC value */
PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_3BYTES << 2));
NVMTarget_SendNVMRegAddress(NVM_REG_DAT0);
MemoryCRC = PDITarget_ReceiveByte();
MemoryCRC |= ((uint16_t)PDITarget_ReceiveByte() << 8);
MemoryCRC |= ((uint32_t)PDITarget_ReceiveByte() << 16);
return MemoryCRC;
}
#endif
/*
LUFA Library
Copyright (C) Dean Camera, 2009.
dean [at] fourwalledcubicle [dot] com
www.fourwalledcubicle.com
*/
/*
Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, and distribute this software
and its documentation for any purpose and without fee is hereby
granted, provided that the above copyright notice appear in all
copies and that both that the copyright notice and this
permission notice and warranty disclaimer appear in supporting
documentation, and that the name of the author not be used in
advertising or publicity pertaining to distribution of the
software without specific, written prior permission.
The author disclaim all warranties with regard to this
software, including all implied warranties of merchantability
and fitness. In no event shall the author be liable for any
special, indirect or consequential damages or any damages
whatsoever resulting from loss of use, data or profits, whether
in an action of contract, negligence or other tortious action,
arising out of or in connection with the use or performance of
this software.
*/
/** \file
*
* Header file for NVMTarget.c.
*/
#ifndef _NVM_TARGET_
#define _NVM_TARGET_
/* Includes: */
#include <avr/io.h>
#include <avr/interrupt.h>
#include <stdbool.h>
#include <LUFA/Common/Common.h>
#include "PDIProtocol.h"
#include "PDITarget.h"
/* Preprocessor Checks: */
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
#undef ENABLE_ISP_PROTOCOL
#if !defined(ENABLE_PDI_PROTOCOL)
#define ENABLE_PDI_PROTOCOL
#endif
#endif
/* Defines: */
#define FLASH_BASE 0x00800000
#define EPPROM_BASE 0x008C0000
#define FUSE_BASE 0x008F0020
#define DATAMEM_BASE 0x01000000
#define PROD_SIGNATURE_BASE 0x008E0200
#define USER_SIGNATURE_BASE 0x008E0400
#define NVM_REG_ADDR0 0x00
#define NVM_REG_ADDR1 0x01
#define NVM_REG_ADDR2 0x02
#define NVM_REG_DAT0 0x04
#define NVM_REG_DAT1 0x05
#define NVM_REG_DAT2 0x06
#define NVM_REG_CMD 0x0A
#define NVM_REG_CTRLA 0x0B
#define NVM_REG_CTRLB 0x0C
#define NVM_REG_INTCTRL 0x0D
#define NVM_REG_STATUS 0x0F
#define NVM_REG_LOCKBITS 0x10
#define NVM_CMD_APPCRC 0x38
#define NVM_CMD_BOOTCRC 0x39
#define NVM_CMD_FLASHCRC 0x78
#define NVM_CMD_READUSERSIG 0x03
/* Function Prototypes: */
void NVMTarget_SendNVMRegAddress(uint8_t Register);
bool NVMTarget_WaitWhileNVMBusBusy(void);
void NVMTarget_WaitWhileNVMControllerBusy(void);
uint32_t NVMTarget_GetMemoryCRC(uint8_t MemoryCommand);
#endif
......@@ -28,10 +28,6 @@
this software.
*/
#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
#warning PDI Programming Protocol support is incomplete and not currently suitable for use.
/** \file
*
* PDI Protocol handler, to process V2 Protocol wrapped PDI commands used in Atmel programmer devices.
......@@ -40,6 +36,9 @@
#define INCLUDE_FROM_PDIPROTOCOL_C
#include "PDIProtocol.h"
#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
#warning PDI Programming Protocol support is incomplete and not currently suitable for use.
uint32_t XPROG_Param_NVMBase;
uint32_t XPROG_Param_EEPageSize;
......@@ -59,7 +58,7 @@ void PDIProtocol_XPROG_SetMode(void)
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
Endpoint_Write_Byte(CMD_XPROG_SETMODE);
Endpoint_Write_Byte(SetMode_XPROG_Params.Protocol ? STATUS_CMD_FAILED : STATUS_CMD_OK);
Endpoint_Write_Byte((SetMode_XPROG_Params.Protocol == XPRG_PROTOCOL_PDI) ? STATUS_CMD_OK : STATUS_CMD_FAILED);
Endpoint_ClearIN();
}
......@@ -115,7 +114,7 @@ static void PDIProtocol_EnterXPROGMode(void)
PDITarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);
/* Wait until the NVM bus becomes active */
bool NVMBusEnabled = PDITarget_WaitWhileNVMBusBusy();
bool NVMBusEnabled = NVMTarget_WaitWhileNVMBusBusy();
Endpoint_Write_Byte(CMD_XPROG);
Endpoint_Write_Byte(XPRG_CMD_ENTER_PROGMODE);
......@@ -131,7 +130,7 @@ static void PDIProtocol_LeaveXPROGMode(void)
Endpoint_ClearOUT();
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
/* Clear the RESET key into the RESET PDI register to allow the XMEGA to run */
/* Clear the RESET key in the RESET PDI register to allow the XMEGA to run */
PDITarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
PDITarget_SendByte(0x00);
......@@ -221,10 +220,10 @@ static void PDIProtocol_ReadMemory(void)
if (ReadMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)
{
PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_CMD);
NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
PDITarget_SendByte(NVM_CMD_READUSERSIG);
// TODO
}
Endpoint_Write_Byte(CMD_XPROG);
......@@ -250,36 +249,14 @@ static void PDIProtocol_ReadCRC(void)
Endpoint_ClearOUT();
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
uint32_t MemoryCRC = 0;
uint8_t CRCReadCommand;
uint32_t MemoryCRC;
if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_APP)
CRCReadCommand = NVM_CMD_APPCRC;
MemoryCRC = NVMTarget_GetMemoryCRC(NVM_CMD_APPCRC);
else if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_BOOT)
CRCReadCommand = NVM_CMD_BOOTCRC;
MemoryCRC = NVMTarget_GetMemoryCRC(NVM_CMD_BOOTCRC);
else
CRCReadCommand = NVM_CMD_FLASHCRC;
/* Set the NVM command to the correct CRC read command */
PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_CMD);
PDITarget_SendByte(CRCReadCommand);
/* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_CTRLA);
PDITarget_SendByte(1 << 0);
/* Wait until the NVM bus and controller is no longer busy */
PDITarget_WaitWhileNVMBusBusy();
PDITarget_WaitWhileNVMControllerBusy();
/* Read the three byte generated CRC value */
PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_3BYTES << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_DAT0);
MemoryCRC = PDITarget_ReceiveByte();
MemoryCRC |= ((uint16_t)PDITarget_ReceiveByte() << 8);
MemoryCRC |= ((uint32_t)PDITarget_ReceiveByte() << 16);
MemoryCRC = NVMTarget_GetMemoryCRC(NVM_CMD_FLASHCRC);
Endpoint_Write_Byte(CMD_XPROG);
Endpoint_Write_Byte(XPRG_CMD_CRC);
......@@ -304,9 +281,9 @@ static void PDIProtocol_SetParam(void)
uint8_t XPROGParam = Endpoint_Read_Byte();
if (XPROGParam == XPRG_PARAM_NVMBASE)
XPROG_Param_NVMBase = Endpoint_Read_DWord_LE();
XPROG_Param_NVMBase = Endpoint_Read_DWord_BE();
else if (XPROGParam == XPRG_PARAM_EEPPAGESIZE)
XPROG_Param_EEPageSize = Endpoint_Read_Word_LE();
XPROG_Param_EEPageSize = Endpoint_Read_Word_BE();
else
ReturnStatus = XPRG_ERR_FAILED;
......
......@@ -43,10 +43,11 @@
#include "V2Protocol.h"
#include "PDITarget.h"
#include "NVMTarget.h"
/* Preprocessor Checks: */
#if (BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1)
#undef ENABLE_ISP_PROTOCOL
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
#undef ENABLE_ISP_PROTOCOL
#if !defined(ENABLE_PDI_PROTOCOL)
#define ENABLE_PDI_PROTOCOL
......@@ -94,6 +95,12 @@
#define XPRG_PARAM_NVMBASE 0x01
#define XPRG_PARAM_EEPPAGESIZE 0x02
#define XPRG_PROTOCOL_PDI 0x00
#define XPRG_PROTOCOL_JTAG 0x01
/* External Variables: */
extern uint32_t XPROG_Param_NVMBase;
/* Function Prototypes: */
void PDIProtocol_XPROG_SetMode(void);
void PDIProtocol_XPROG_Command(void);
......
......@@ -28,8 +28,6 @@
this software.
*/
#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
/** \file
*
* Target-related functions for the PDI Protocol decoder.
......@@ -38,6 +36,8 @@
#define INCLUDE_FROM_PDITARGET_C
#include "PDITarget.h"
#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
volatile bool IsSending;
#if !defined(PDI_VIA_HARDWARE_USART)
......@@ -275,40 +275,4 @@ void PDITarget_SendBreak(void)
#endif
}
void PDITarget_SendAddress(uint32_t Address)
{
PDITarget_SendByte(Address >> 24);
PDITarget_SendByte(Address >> 26);
PDITarget_SendByte(Address >> 8);
PDITarget_SendByte(Address & 0xFF);
}
bool PDITarget_WaitWhileNVMBusBusy(void)
{
uint8_t AttemptsRemaining = 255;
/* Poll the STATUS register to check to see if NVM access has been enabled */
while (AttemptsRemaining--)
{
PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
return true;
}
return false;
}
void PDITarget_WaitWhileNVMControllerBusy(void)
{
/* Poll the NVM STATUS register to check to see if NVM controller is busy */
for (;;)
{
PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_1BYTE << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_STATUS);
if (!(PDITarget_ReceiveByte() & (1 << 7)))
return;
}
}
#endif
......@@ -44,8 +44,8 @@
#include <LUFA/Common/Common.h>
/* Preprocessor Checks: */
#if (BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1)
#undef ENABLE_ISP_PROTOCOL
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
#undef ENABLE_ISP_PROTOCOL
#if !defined(ENABLE_PDI_PROTOCOL)
#define ENABLE_PDI_PROTOCOL
......@@ -53,7 +53,7 @@
#endif
/* Defines: */
#if BOARD == BOARD_XPLAIN
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
#define PDI_VIA_HARDWARE_USART
#else
#define BITBANG_PDIDATA_PORT PORTB
......@@ -95,32 +95,6 @@
#define PDI_POINTER_INDIRECT 0
#define PDI_POINTER_INDIRECT_PI 1
#define PDI_POINTER_DIRECT 2
#define FLASH_BASE 0x00800000
#define EPPROM_BASE 0x008C0000
#define FUSE_BASE 0x008F0020
#define DATAMEM_BASE 0x01000000
#define PROD_SIGNATURE_BASE 0x008E0200
#define USER_SIGNATURE_BASE 0x008E0400
#define DATAMEM_NVM_BASE 0x01C0
#define DATAMEM_NVM_ADDR0 (DATAMEM_NVM_BASE | 0x00)
#define DATAMEM_NVM_ADDR1 (DATAMEM_NVM_BASE | 0x01)
#define DATAMEM_NVM_ADDR2 (DATAMEM_NVM_BASE | 0x02)
#define DATAMEM_NVM_DAT0 (DATAMEM_NVM_BASE | 0x04)
#define DATAMEM_NVM_DAT1 (DATAMEM_NVM_BASE | 0x05)
#define DATAMEM_NVM_DAT2 (DATAMEM_NVM_BASE | 0x06)
#define DATAMEM_NVM_CMD (DATAMEM_NVM_BASE | 0x0A)
#define DATAMEM_NVM_CTRLA (DATAMEM_NVM_BASE | 0x0B)
#define DATAMEM_NVM_CTRLB (DATAMEM_NVM_BASE | 0x0C)
#define DATAMEM_NVM_INTCTRL (DATAMEM_NVM_BASE | 0x0D)
#define DATAMEM_NVM_STATUS (DATAMEM_NVM_BASE | 0x0F)
#define DATAMEM_NVM_LOCKBITS (DATAMEM_NVM_BASE | 0x10)
#define NVM_CMD_APPCRC 0x38
#define NVM_CMD_BOOTCRC 0x39
#define NVM_CMD_FLASHCRC 0x78
#define NVM_CMD_READUSERSIG 0x03
/* Function Prototypes: */
void PDITarget_EnableTargetPDI(void);
......@@ -128,9 +102,5 @@
void PDITarget_SendByte(uint8_t Byte);
uint8_t PDITarget_ReceiveByte(void);
void PDITarget_SendBreak(void);
void PDITarget_SendAddress(uint32_t Address);
bool PDITarget_WaitWhileNVMBusBusy(void);
void PDITarget_WaitWhileNVMControllerBusy(void);
#endif
......@@ -47,8 +47,8 @@
#include "PDIProtocol.h"
/* Preprocessor Checks: */
#if (BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1)
#undef ENABLE_ISP_PROTOCOL
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
#undef ENABLE_ISP_PROTOCOL
#if !defined(ENABLE_PDI_PROTOCOL)
#define ENABLE_PDI_PROTOCOL
......
......@@ -133,6 +133,7 @@ SRC = $(TARGET).c \
Lib/ISPTarget.c \
Lib/PDIProtocol.c \
Lib/PDITarget.c \
Lib/NVMTarget.c \
$(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/DevChapter9.c \
$(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Endpoint.c \
$(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Host.c \
......
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