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Erik Strand
lufa
Commits
be71f934
Commit
be71f934
authored
Dec 23, 2009
by
Dean Camera
Browse files
Seperate out XMEGA and TINY NVM routines into seperate files.
parent
cda88cf9
Changes
7
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LUFA.pnproj
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Projects/AVRISP/Lib/PDIProtocol.c
View file @
be71f934
...
...
@@ -160,28 +160,28 @@ static void PDIProtocol_Erase(void)
Endpoint_ClearOUT
();
Endpoint_SetEndpointDirection
(
ENDPOINT_DIR_IN
);
uint8_t
EraseCommand
=
NVM_CMD_NOOP
;
uint8_t
EraseCommand
=
XMEGA_
NVM_CMD_NOOP
;
/* Determine which NVM command to send to the device depending on the memory to erase */
if
(
Erase_XPROG_Params
.
MemoryType
==
XPRG_ERASE_CHIP
)
EraseCommand
=
NVM_CMD_CHIPERASE
;
EraseCommand
=
XMEGA_
NVM_CMD_CHIPERASE
;
else
if
(
Erase_XPROG_Params
.
MemoryType
==
XPRG_ERASE_APP
)
EraseCommand
=
NVM_CMD_ERASEAPPSEC
;
EraseCommand
=
XMEGA_
NVM_CMD_ERASEAPPSEC
;
else
if
(
Erase_XPROG_Params
.
MemoryType
==
XPRG_ERASE_BOOT
)
EraseCommand
=
NVM_CMD_ERASEBOOTSEC
;
EraseCommand
=
XMEGA_
NVM_CMD_ERASEBOOTSEC
;
else
if
(
Erase_XPROG_Params
.
MemoryType
==
XPRG_ERASE_EEPROM
)
EraseCommand
=
NVM_CMD_ERASEEEPROM
;
EraseCommand
=
XMEGA_
NVM_CMD_ERASEEEPROM
;
else
if
(
Erase_XPROG_Params
.
MemoryType
==
XPRG_ERASE_APP_PAGE
)
EraseCommand
=
NVM_CMD_ERASEAPPSECPAGE
;
EraseCommand
=
XMEGA_
NVM_CMD_ERASEAPPSECPAGE
;
else
if
(
Erase_XPROG_Params
.
MemoryType
==
XPRG_ERASE_BOOT_PAGE
)
EraseCommand
=
NVM_CMD_ERASEBOOTSECPAGE
;
EraseCommand
=
XMEGA_
NVM_CMD_ERASEBOOTSECPAGE
;
else
if
(
Erase_XPROG_Params
.
MemoryType
==
XPRG_ERASE_EEPROM_PAGE
)
EraseCommand
=
NVM_CMD_ERASEEEPROMPAGE
;
EraseCommand
=
XMEGA_
NVM_CMD_ERASEEEPROMPAGE
;
else
if
(
Erase_XPROG_Params
.
MemoryType
==
XPRG_ERASE_USERSIG
)
EraseCommand
=
NVM_CMD_ERASEUSERSIG
;
EraseCommand
=
XMEGA_
NVM_CMD_ERASEUSERSIG
;
/* Erase the target memory, indicate timeout if ocurred */
if
(
!
(
NVMTarget
_EraseMemory
(
EraseCommand
,
Erase_XPROG_Params
.
Address
)))
if
(
!
(
XMEGANVM
_EraseMemory
(
EraseCommand
,
Erase_XPROG_Params
.
Address
)))
ReturnStatus
=
XPRG_ERR_TIMEOUT
;
Endpoint_Write_Byte
(
CMD_XPROG
);
...
...
@@ -214,47 +214,47 @@ static void PDIProtocol_WriteMemory(void)
Endpoint_SetEndpointDirection
(
ENDPOINT_DIR_IN
);
/* Assume FLASH page programming by default, as it is the common case */
uint8_t
WriteCommand
=
NVM_CMD_WRITEFLASHPAGE
;
uint8_t
WriteBuffCommand
=
NVM_CMD_LOADFLASHPAGEBUFF
;
uint8_t
EraseBuffCommand
=
NVM_CMD_ERASEFLASHPAGEBUFF
;
uint8_t
WriteCommand
=
XMEGA_
NVM_CMD_WRITEFLASHPAGE
;
uint8_t
WriteBuffCommand
=
XMEGA_
NVM_CMD_LOADFLASHPAGEBUFF
;
uint8_t
EraseBuffCommand
=
XMEGA_
NVM_CMD_ERASEFLASHPAGEBUFF
;
bool
PagedMemory
=
true
;
if
(
WriteMemory_XPROG_Params
.
MemoryType
==
XPRG_MEM_TYPE_APPL
)
{
WriteCommand
=
NVM_CMD_WRITEAPPSECPAGE
;
WriteCommand
=
XMEGA_
NVM_CMD_WRITEAPPSECPAGE
;
}
else
if
(
WriteMemory_XPROG_Params
.
MemoryType
==
XPRG_MEM_TYPE_BOOT
)
{
WriteCommand
=
NVM_CMD_WRITEBOOTSECPAGE
;
WriteCommand
=
XMEGA_
NVM_CMD_WRITEBOOTSECPAGE
;
}
else
if
(
WriteMemory_XPROG_Params
.
MemoryType
==
XPRG_MEM_TYPE_EEPROM
)
{
WriteCommand
=
NVM_CMD_WRITEEEPROMPAGE
;
WriteBuffCommand
=
NVM_CMD_LOADEEPROMPAGEBUFF
;
EraseBuffCommand
=
NVM_CMD_ERASEEEPROMPAGEBUFF
;
WriteCommand
=
XMEGA_
NVM_CMD_WRITEEEPROMPAGE
;
WriteBuffCommand
=
XMEGA_
NVM_CMD_LOADEEPROMPAGEBUFF
;
EraseBuffCommand
=
XMEGA_
NVM_CMD_ERASEEEPROMPAGEBUFF
;
}
else
if
(
WriteMemory_XPROG_Params
.
MemoryType
==
XPRG_MEM_TYPE_USERSIG
)
{
/* User signature is paged, but needs us to manually indicate the mode bits since the host doesn't set them */
WriteMemory_XPROG_Params
.
PageMode
=
(
XPRG_PAGEMODE_ERASE
|
XPRG_PAGEMODE_WRITE
);
WriteCommand
=
NVM_CMD_WRITEUSERSIG
;
WriteCommand
=
XMEGA_
NVM_CMD_WRITEUSERSIG
;
}
else
if
(
WriteMemory_XPROG_Params
.
MemoryType
==
XPRG_MEM_TYPE_FUSE
)
{
WriteCommand
=
NVM_CMD_WRITEFUSE
;
WriteCommand
=
XMEGA_
NVM_CMD_WRITEFUSE
;
PagedMemory
=
false
;
}
else
if
(
WriteMemory_XPROG_Params
.
MemoryType
==
XPRG_MEM_TYPE_LOCKBITS
)
{
WriteCommand
=
NVM_CMD_WRITELOCK
;
WriteCommand
=
XMEGA_
NVM_CMD_WRITELOCK
;
PagedMemory
=
false
;
}
/* Send the appropriate memory write commands to the device, indicate timeout if occurred */
if
((
PagedMemory
&&
!
NVMTarget
_WritePageMemory
(
WriteBuffCommand
,
EraseBuffCommand
,
WriteCommand
,
if
((
PagedMemory
&&
!
XMEGANVM
_WritePageMemory
(
WriteBuffCommand
,
EraseBuffCommand
,
WriteCommand
,
WriteMemory_XPROG_Params
.
PageMode
,
WriteMemory_XPROG_Params
.
Address
,
WriteMemory_XPROG_Params
.
ProgData
,
WriteMemory_XPROG_Params
.
Length
))
||
(
!
PagedMemory
&&
!
NVMTarget
_WriteByteMemory
(
WriteCommand
,
WriteMemory_XPROG_Params
.
Address
,
(
!
PagedMemory
&&
!
XMEGANVM
_WriteByteMemory
(
WriteCommand
,
WriteMemory_XPROG_Params
.
Address
,
WriteMemory_XPROG_Params
.
ProgData
)))
{
ReturnStatus
=
XPRG_ERR_TIMEOUT
;
...
...
@@ -290,7 +290,7 @@ static void PDIProtocol_ReadMemory(void)
uint8_t
ReadBuffer
[
256
];
/* Read the target's memory, indicate timeout if occurred */
if
(
!
(
NVMTarget
_ReadMemory
(
ReadMemory_XPROG_Params
.
Address
,
ReadBuffer
,
ReadMemory_XPROG_Params
.
Length
)))
if
(
!
(
XMEGANVM
_ReadMemory
(
ReadMemory_XPROG_Params
.
Address
,
ReadBuffer
,
ReadMemory_XPROG_Params
.
Length
)))
ReturnStatus
=
XPRG_ERR_TIMEOUT
;
Endpoint_Write_Byte
(
CMD_XPROG
);
...
...
@@ -319,19 +319,19 @@ static void PDIProtocol_ReadCRC(void)
Endpoint_ClearOUT
();
Endpoint_SetEndpointDirection
(
ENDPOINT_DIR_IN
);
uint8_t
CRCCommand
=
NVM_CMD_NOOP
;
uint8_t
CRCCommand
=
XMEGA_
NVM_CMD_NOOP
;
uint32_t
MemoryCRC
;
/* Determine which NVM command to send to the device depending on the memory to CRC */
if
(
ReadCRC_XPROG_Params
.
CRCType
==
XPRG_CRC_APP
)
CRCCommand
=
NVM_CMD_APPCRC
;
CRCCommand
=
XMEGA_
NVM_CMD_APPCRC
;
else
if
(
ReadCRC_XPROG_Params
.
CRCType
==
XPRG_CRC_BOOT
)
CRCCommand
=
NVM_CMD_BOOTCRC
;
CRCCommand
=
XMEGA_
NVM_CMD_BOOTCRC
;
else
CRCCommand
=
NVM_CMD_FLASHCRC
;
CRCCommand
=
XMEGA_
NVM_CMD_FLASHCRC
;
/* Perform and retrieve the memory CRC, indicate timeout if occurred */
if
(
!
(
NVMTarget
_GetMemoryCRC
(
CRCCommand
,
&
MemoryCRC
)))
if
(
!
(
XMEGANVM
_GetMemoryCRC
(
CRCCommand
,
&
MemoryCRC
)))
ReturnStatus
=
XPRG_ERR_TIMEOUT
;
Endpoint_Write_Byte
(
CMD_XPROG
);
...
...
Projects/AVRISP/Lib/TINYNVM.c
0 → 100644
View file @
be71f934
/*
LUFA Library
Copyright (C) Dean Camera, 2009.
dean [at] fourwalledcubicle [dot] com
www.fourwalledcubicle.com
*/
/*
Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, and distribute this software
and its documentation for any purpose and without fee is hereby
granted, provided that the above copyright notice appear in all
copies and that both that the copyright notice and this
permission notice and warranty disclaimer appear in supporting
documentation, and that the name of the author not be used in
advertising or publicity pertaining to distribution of the
software without specific, written prior permission.
The author disclaim all warranties with regard to this
software, including all implied warranties of merchantability
and fitness. In no event shall the author be liable for any
special, indirect or consequential damages or any damages
whatsoever resulting from loss of use, data or profits, whether
in an action of contract, negligence or other tortious action,
arising out of or in connection with the use or performance of
this software.
*/
/** \file
*
* Target-related functions for the TINY target's NVM module.
*/
#define INCLUDE_FROM_TINYNVM_C
#include
"TINYNVM.h"
#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)
/** Sends the given NVM register address to the target.
*
* \param[in] Register NVM register whose absolute address is to be sent
*/
void
TINYNVM_SendNVMRegAddress
(
const
uint8_t
Register
)
{
// TODO
}
/** Sends the given 32-bit absolute address to the target.
*
* \param[in] AbsoluteAddress Absolute address to send to the target
*/
void
TINYNVM_SendAddress
(
const
uint32_t
AbsoluteAddress
)
{
// TODO
}
/** Waits while the target's NVM controller is busy performing an operation, exiting if the
* timeout period expires.
*
* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
*/
bool
TINYNVM_WaitWhileNVMControllerBusy
(
void
)
{
// TODO
return
false
;
}
/** Retrieves the CRC value of the given memory space.
*
* \param[in] CRCCommand NVM CRC command to issue to the target
* \param[out] CRCDest CRC Destination when read from the target
*
* \return Boolean true if the command sequence complete successfully
*/
bool
TINYNVM_GetMemoryCRC
(
const
uint8_t
CRCCommand
,
uint32_t
*
const
CRCDest
)
{
// TODO
return
true
;
}
/** Reads memory from the target's memory spaces.
*
* \param[in] ReadAddress Start address to read from within the target's address space
* \param[out] ReadBuffer Buffer to store read data into
* \param[in] ReadSize Number of bytes to read
*
* \return Boolean true if the command sequence complete successfully
*/
bool
TINYNVM_ReadMemory
(
const
uint32_t
ReadAddress
,
uint8_t
*
ReadBuffer
,
const
uint16_t
ReadSize
)
{
// TODO
return
true
;
}
/** Writes byte addressed memory to the target's memory spaces.
*
* \param[in] WriteCommand Command to send to the device to write each memory byte
* \param[in] WriteAddress Start address to write to within the target's address space
* \param[in] WriteBuffer Buffer to source data from
*
* \return Boolean true if the command sequence complete successfully
*/
bool
TINYNVM_WriteByteMemory
(
const
uint8_t
WriteCommand
,
const
uint32_t
WriteAddress
,
const
uint8_t
*
WriteBuffer
)
{
// TODO
return
true
;
}
/** Writes page addressed memory to the target's memory spaces.
*
* \param[in] WriteBuffCommand Command to send to the device to write a byte to the memory page buffer
* \param[in] EraseBuffCommand Command to send to the device to erase the memory page buffer
* \param[in] WritePageCommand Command to send to the device to write the page buffer to the destination memory
* \param[in] PageMode Bitfield indicating what operations need to be executed on the specified page
* \param[in] WriteAddress Start address to write the page data to within the target's address space
* \param[in] WriteBuffer Buffer to source data from
* \param[in] WriteSize Number of bytes to write
*
* \return Boolean true if the command sequence complete successfully
*/
bool
TINYNVM_WritePageMemory
(
const
uint8_t
WriteBuffCommand
,
const
uint8_t
EraseBuffCommand
,
const
uint8_t
WritePageCommand
,
const
uint8_t
PageMode
,
const
uint32_t
WriteAddress
,
const
uint8_t
*
WriteBuffer
,
const
uint16_t
WriteSize
)
{
// TODO
return
true
;
}
/** Erases a specific memory space of the target.
*
* \param[in] EraseCommand NVM erase command to send to the device
* \param[in] Address Address inside the memory space to erase
*
* \return Boolean true if the command sequence complete successfully
*/
bool
TINYNVM_EraseMemory
(
const
uint8_t
EraseCommand
,
const
uint32_t
Address
)
{
// TODO
return
true
;
}
#endif
Projects/AVRISP/Lib/TINYNVM.h
0 → 100644
View file @
be71f934
/*
LUFA Library
Copyright (C) Dean Camera, 2009.
dean [at] fourwalledcubicle [dot] com
www.fourwalledcubicle.com
*/
/*
Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, and distribute this software
and its documentation for any purpose and without fee is hereby
granted, provided that the above copyright notice appear in all
copies and that both that the copyright notice and this
permission notice and warranty disclaimer appear in supporting
documentation, and that the name of the author not be used in
advertising or publicity pertaining to distribution of the
software without specific, written prior permission.
The author disclaim all warranties with regard to this
software, including all implied warranties of merchantability
and fitness. In no event shall the author be liable for any
special, indirect or consequential damages or any damages
whatsoever resulting from loss of use, data or profits, whether
in an action of contract, negligence or other tortious action,
arising out of or in connection with the use or performance of
this software.
*/
/** \file
*
* Header file for TINYNVM.c.
*/
#ifndef _TINY_NVM_
#define _TINY_NVM_
/* Includes: */
#include
<avr/io.h>
#include
<avr/interrupt.h>
#include
<stdbool.h>
#include
<LUFA/Common/Common.h>
#include
"TPITarget.h"
/* Preprocessor Checks: */
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
#undef ENABLE_ISP_PROTOCOL
#undef ENABLE_TPI_PROTOCOL
#if !defined(ENABLE_PDI_PROTOCOL)
#define ENABLE_PDI_PROTOCOL
#endif
#endif
/* Defines: */
#define TINY_NVM_BUSY_TIMEOUT_MS 200
/* Function Prototypes: */
void
TINYNVM_SendNVMRegAddress
(
const
uint8_t
Register
);
void
TINYNVM_SendAddress
(
const
uint32_t
AbsoluteAddress
);
bool
TINYNVM_WaitWhileNVMControllerBusy
(
void
);
bool
TINYNVM_GetMemoryCRC
(
const
uint8_t
CRCCommand
,
uint32_t
*
const
CRCDest
);
bool
TINYNVM_ReadMemory
(
const
uint32_t
ReadAddress
,
uint8_t
*
ReadBuffer
,
const
uint16_t
ReadSize
);
bool
TINYNVM_WriteByteMemory
(
const
uint8_t
WriteCommand
,
const
uint32_t
WriteAddress
,
const
uint8_t
*
WriteBuffer
);
bool
TINYNVM_WritePageMemory
(
const
uint8_t
WriteBuffCommand
,
const
uint8_t
EraseBuffCommand
,
const
uint8_t
WritePageCommand
,
const
uint8_t
PageMode
,
const
uint32_t
WriteAddress
,
const
uint8_t
*
WriteBuffer
,
const
uint16_t
WriteSize
);
bool
TINYNVM_EraseMemory
(
const
uint8_t
EraseCommand
,
const
uint32_t
Address
);
#endif
Projects/AVRISP/Lib/XMEGANVM.c
View file @
be71f934
...
...
@@ -30,11 +30,11 @@
/** \file
*
* Target-related functions for the target's NVM module.
* Target-related functions for the
XMEGA
target's NVM module.
*/
#define INCLUDE_FROM_
NVMTARGET
_C
#include
"
NVMTarget
.h"
#define INCLUDE_FROM_
XMEGA_NVM
_C
#include
"
XMEGANVM
.h"
#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
...
...
@@ -42,20 +42,20 @@
*
* \param[in] Register NVM register whose absolute address is to be sent
*/
void
NVMTarget
_SendNVMRegAddress
(
const
uint8_t
Register
)
void
XMEGANVM
_SendNVMRegAddress
(
const
uint8_t
Register
)
{
/* Determine the absolute register address from the NVM base memory address and the NVM register address */
uint32_t
Address
=
XPROG_Param_NVMBase
|
Register
;
/* Send the calculated 32-bit address to the target, LSB first */
NVMTarget
_SendAddress
(
Address
);
XMEGANVM
_SendAddress
(
Address
);
}
/** Sends the given 32-bit absolute address to the target.
*
* \param[in] AbsoluteAddress Absolute address to send to the target
*/
void
NVMTarget
_SendAddress
(
const
uint32_t
AbsoluteAddress
)
void
XMEGANVM
_SendAddress
(
const
uint32_t
AbsoluteAddress
)
{
/* Send the given 32-bit address to the target, LSB first */
PDITarget_SendByte
(
AbsoluteAddress
&
0xFF
);
...
...
@@ -69,19 +69,19 @@ void NVMTarget_SendAddress(const uint32_t AbsoluteAddress)
*
* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
*/
bool
NVMTarget
_WaitWhileNVMControllerBusy
(
void
)
bool
XMEGANVM
_WaitWhileNVMControllerBusy
(
void
)
{
TCNT0
=
0
;
TIFR0
=
(
1
<<
OCF1A
);
uint8_t
TimeoutMS
=
PDI_NVM
_TIMEOUT_MS
;
uint8_t
TimeoutMS
=
XMEGA_NVM_BUSY
_TIMEOUT_MS
;
/* Poll the NVM STATUS register while the NVM controller is busy */
while
(
TimeoutMS
)
{
/* Send a LDS command to read the NVM STATUS register to check the BUSY flag */
PDITarget_SendByte
(
PDI_CMD_LDS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_STATUS
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_STATUS
);
/* Check to see if the BUSY flag is still set */
if
(
!
(
PDITarget_ReceiveByte
()
&
(
1
<<
7
)))
...
...
@@ -104,20 +104,20 @@ bool NVMTarget_WaitWhileNVMControllerBusy(void)
*
* \return Boolean true if the command sequence complete successfully
*/
bool
NVMTarget
_GetMemoryCRC
(
const
uint8_t
CRCCommand
,
uint32_t
*
const
CRCDest
)
bool
XMEGANVM
_GetMemoryCRC
(
const
uint8_t
CRCCommand
,
uint32_t
*
const
CRCDest
)
{
/* Wait until the NVM controller is no longer busy */
if
(
!
(
NVMTarget
_WaitWhileNVMControllerBusy
()))
if
(
!
(
XMEGANVM
_WaitWhileNVMControllerBusy
()))
return
false
;
/* Set the NVM command to the correct CRC read command */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CMD
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CMD
);
PDITarget_SendByte
(
CRCCommand
);
/* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CTRLA
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CTRLA
);
PDITarget_SendByte
(
1
<<
0
);
/* Wait until the NVM bus is ready again */
...
...
@@ -125,24 +125,24 @@ bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
return
false
;
/* Wait until the NVM controller is no longer busy */
if
(
!
(
NVMTarget
_WaitWhileNVMControllerBusy
()))
if
(
!
(
XMEGANVM
_WaitWhileNVMControllerBusy
()))
return
false
;
*
CRCDest
=
0
;
/* Read the first generated CRC byte value */
PDITarget_SendByte
(
PDI_CMD_LDS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_DAT0
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_DAT0
);
*
CRCDest
=
PDITarget_ReceiveByte
();
/* Read the second generated CRC byte value */
PDITarget_SendByte
(
PDI_CMD_LDS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_DAT1
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_DAT1
);
*
CRCDest
|=
((
uint16_t
)
PDITarget_ReceiveByte
()
<<
8
);
/* Read the third generated CRC byte value */
PDITarget_SendByte
(
PDI_CMD_LDS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_DAT2
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_DAT2
);
*
CRCDest
|=
((
uint32_t
)
PDITarget_ReceiveByte
()
<<
16
);
return
true
;
...
...
@@ -156,20 +156,20 @@ bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
*
* \return Boolean true if the command sequence complete successfully
*/
bool
NVMTarget
_ReadMemory
(
const
uint32_t
ReadAddress
,
uint8_t
*
ReadBuffer
,
const
uint16_t
ReadSize
)
bool
XMEGANVM
_ReadMemory
(
const
uint32_t
ReadAddress
,
uint8_t
*
ReadBuffer
,
const
uint16_t
ReadSize
)
{
/* Wait until the NVM controller is no longer busy */
if
(
!
(
NVMTarget
_WaitWhileNVMControllerBusy
()))
if
(
!
(
XMEGANVM
_WaitWhileNVMControllerBusy
()))
return
false
;
/* Send the READNVM command to the NVM controller for reading of an arbitrary location */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CMD
);
PDITarget_SendByte
(
NVM_CMD_READNVM
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CMD
);
PDITarget_SendByte
(
XMEGA_
NVM_CMD_READNVM
);
/* Load the PDI pointer register with the start address we want to read from */
PDITarget_SendByte
(
PDI_CMD_ST
|
(
PDI_POINTER_DIRECT
<<
2
)
|
PDI_DATSIZE_4BYTES
);
NVMTarget
_SendAddress
(
ReadAddress
);
XMEGANVM
_SendAddress
(
ReadAddress
);
/* Send the REPEAT command with the specified number of bytes to read */
PDITarget_SendByte
(
PDI_CMD_REPEAT
|
PDI_DATSIZE_1BYTE
);
...
...
@@ -191,20 +191,20 @@ bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const
*
* \return Boolean true if the command sequence complete successfully
*/
bool
NVMTarget
_WriteByteMemory
(
const
uint8_t
WriteCommand
,
const
uint32_t
WriteAddress
,
const
uint8_t
*
WriteBuffer
)
bool
XMEGANVM
_WriteByteMemory
(
const
uint8_t
WriteCommand
,
const
uint32_t
WriteAddress
,
const
uint8_t
*
WriteBuffer
)
{
/* Wait until the NVM controller is no longer busy */
if
(
!
(
NVMTarget
_WaitWhileNVMControllerBusy
()))
if
(
!
(
XMEGANVM
_WaitWhileNVMControllerBusy
()))
return
false
;
/* Send the memory write command to the target */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CMD
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CMD
);
PDITarget_SendByte
(
WriteCommand
);
/* Send new memory byte to the memory to the target */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendAddress
(
WriteAddress
);
XMEGANVM
_SendAddress
(
WriteAddress
);
PDITarget_SendByte
(
*
(
WriteBuffer
++
));
return
true
;
...
...
@@ -222,41 +222,41 @@ bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteA
*
* \return Boolean true if the command sequence complete successfully
*/
bool
NVMTarget
_WritePageMemory
(
const
uint8_t
WriteBuffCommand
,
const
uint8_t
EraseBuffCommand
,
bool
XMEGANVM
_WritePageMemory
(
const
uint8_t
WriteBuffCommand
,
const
uint8_t
EraseBuffCommand
,
const
uint8_t
WritePageCommand
,
const
uint8_t
PageMode
,
const
uint32_t
WriteAddress
,
const
uint8_t
*
WriteBuffer
,
const
uint16_t
WriteSize
)
{
if
(
PageMode
&
XPRG_PAGEMODE_ERASE
)
{
/* Wait until the NVM controller is no longer busy */
if
(
!
(
NVMTarget
_WaitWhileNVMControllerBusy
()))
if
(
!
(
XMEGANVM
_WaitWhileNVMControllerBusy
()))
return
false
;
/* Send the memory buffer erase command to the target */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CMD
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CMD
);
PDITarget_SendByte
(
EraseBuffCommand
);
/* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CTRLA
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CTRLA
);
PDITarget_SendByte
(
1
<<
0
);
}
if
(
WriteSize
)
{
/* Wait until the NVM controller is no longer busy */
if
(
!
(
NVMTarget
_WaitWhileNVMControllerBusy
()))
if
(
!
(
XMEGANVM
_WaitWhileNVMControllerBusy
()))
return
false
;
/* Send the memory buffer write command to the target */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CMD
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CMD
);
PDITarget_SendByte
(
WriteBuffCommand
);
/* Load the PDI pointer register with the start address we want to write to */
PDITarget_SendByte
(
PDI_CMD_ST
|
(
PDI_POINTER_DIRECT
<<
2
)
|
PDI_DATSIZE_4BYTES
);
NVMTarget
_SendAddress
(
WriteAddress
);
XMEGANVM
_SendAddress
(
WriteAddress
);
/* Send the REPEAT command with the specified number of bytes to write */
PDITarget_SendByte
(
PDI_CMD_REPEAT
|
PDI_DATSIZE_1BYTE
);
...
...
@@ -271,17 +271,17 @@ bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t Era
if
(
PageMode
&
XPRG_PAGEMODE_WRITE
)
{
/* Wait until the NVM controller is no longer busy */
if
(
!
(
NVMTarget
_WaitWhileNVMControllerBusy
()))
if
(
!
(
XMEGANVM
_WaitWhileNVMControllerBusy
()))
return
false
;
/* Send the memory write command to the target */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CMD
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CMD
);
PDITarget_SendByte
(
WritePageCommand
);
/* Send the address of the first page location to write the memory page */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendAddress
(
WriteAddress
);
XMEGANVM
_SendAddress
(
WriteAddress
);
PDITarget_SendByte
(
0x00
);
}
...
...
@@ -295,30 +295,30 @@ bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t Era
*
* \return Boolean true if the command sequence complete successfully
*/
bool
NVMTarget
_EraseMemory
(
const
uint8_t
EraseCommand
,
const
uint32_t
Address
)
bool
XMEGANVM
_EraseMemory
(
const
uint8_t
EraseCommand
,
const
uint32_t
Address
)
{
/* Wait until the NVM controller is no longer busy */
if
(
!
(
NVMTarget
_WaitWhileNVMControllerBusy
()))
if
(
!
(
XMEGANVM
_WaitWhileNVMControllerBusy
()))
return
false
;
/* Send the memory erase command to the target */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CMD
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CMD
);
PDITarget_SendByte
(
EraseCommand
);
/* Chip erase is handled separately, since it's procedure is different to other erase types */
if
(
EraseCommand
==
NVM_CMD_CHIPERASE
)
if
(
EraseCommand
==
XMEGA_
NVM_CMD_CHIPERASE
)
{
/* Set CMDEX bit in NVM CTRLA register to start the chip erase */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendNVMRegAddress
(
NVM_REG_CTRLA
);
XMEGANVM
_SendNVMRegAddress
(
XMEGA_
NVM_REG_CTRLA
);
PDITarget_SendByte
(
1
<<
0
);
}
else
{
/* Other erase modes just need us to address a byte within the target memory space */
PDITarget_SendByte
(
PDI_CMD_STS
|
(
PDI_DATSIZE_4BYTES
<<
2
));
NVMTarget
_SendAddress
(
Address
);
XMEGANVM
_SendAddress
(
Address
);
PDITarget_SendByte
(
0x00
);
}
...
...