added attiny2313 version

FabFTDI Attiny2313/eagle.epf

+[Eagle]
+Version="08 03 02"
+Platform="Windows"
+Globals="Globals"
+Desktop="Desktop"
+
+[Globals]
+AutoSaveProject=1
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/FAB_Hello.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/fab.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/fabPatil.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/ng.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/fablab/usb_con-update.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/Adafruit/adafruit.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/LilyPad-Wearables.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Aesthetics.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-AnalogIC.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Boards.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Capacitors.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Connectors.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-DigitalIC.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-DiscreteSemi.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Displays.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Electromechanical.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-FreqCtrl.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-LED.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Passives.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-PowerIC.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-RF.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Resistors.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Retired.lbr"
+UsedLibrary="C:/Users/Prashant Patil/Dropbox (MIT)/Documents/eagle/Custom Libraries/SparkFun Library/SparkFun-Sensors.lbr"
+
+[Win_1]
+Type="Board Editor"
+Loc="0 0 1919 1017"
+State=3
+Number=2
+File="FabFTDI.brd"
+View="-14.8189 0.8552 43.9371 27.0601"
+WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524 0.4064"
+PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
+PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
+ViaDiameters=" 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.3 0"
+ViaDrills=" 0.2 0.25 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35 0.3"
+HoleDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35"
+TextSizes=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.778"
+PolygonSpacings=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27"
+PolygonIsolates=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
+MiterRadiuss=" 0.254 0.3175 0.635 1.27 2.54 1 2 2.5 5 7.5 10 0"
+DimensionWidths=" 0 0.127 0.254 0.1 0.26 0.13"
+DimensionExtWidths=" 0.127 0.254 0.1 0.13 0.26 0"
+DimensionExtLengths=" 1.27 2.54 1 2 3 0"
+DimensionExtOffsets=" 1.27 2.54 1 2 3 0"
+SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635"
+WireBend=1
+WireBendSet=0
+WireCap=1
+MiterStyle=0
+PadShape=0
+ViaShape=1
+PolygonPour=0
+PolygonRank=1
+PolygonThermals=1
+PolygonOrphans=0
+TextRatio=8
+DimensionUnit=1
+DimensionPrecision=2
+DimensionShowUnit=0
+PinDirection=3
+PinFunction=0
+PinLength=2
+PinVisible=3
+SwapLevel=0
+ArcDirection=0
+AddLevel=2
+PadsSameType=0
+Layer=1
+
+[Win_2]
+Type="Control Panel"
+Loc="0 0 1919 1017"
+State=1
+Number=0
+
+[Desktop]
+Screen="1920 1080"
+Window="Win_1"
+Window="Win_2"

FabFTDI Attiny441/FabFTDI.brd

@@ -28,14 +28,14 @@
 <layer number="17" name="Pads" color="2" fill="1" visible="no" active="yes"/>
 <layer number="18" name="Vias" color="2" fill="1" visible="no" active="yes"/>
 <layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>
-<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>
-<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
-<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>
-<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="no" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="no" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="yes"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="no" active="yes"/>
 <layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="yes"/>
 <layer number="25" name="tNames" color="7" fill="1" visible="no" active="yes"/>
 <layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/>
-<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="no" active="yes"/>
 <layer number="28" name="bValues" color="7" fill="1" visible="no" active="yes"/>
 <layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>
 <layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>
@@ -141,9 +141,9 @@
 <board>
 <plain>
 <wire x1="-3.683" y1="-0.508" x2="51.054" y2="-0.508" width="0" layer="20"/>
-<wire x1="51.054" y1="-0.508" x2="51.288" y2="26.213" width="0" layer="20"/>
-<wire x1="51.288" y1="26.213" x2="-3.683" y2="26.213" width="0" layer="20"/>
-<wire x1="-3.683" y1="26.213" x2="-3.683" y2="-0.508" width="0" layer="20"/>
+<wire x1="51.054" y1="-0.508" x2="51.288" y2="29.515" width="0" layer="20"/>
+<wire x1="51.288" y1="29.515" x2="-3.683" y2="29.515" width="0" layer="20"/>
+<wire x1="-3.683" y1="29.515" x2="-3.683" y2="-0.508" width="0" layer="20"/>
 </plain>
 <libraries>
 <library name="fabPatil">
@@ -461,13 +461,13 @@ design rules under a new name.</description>
 <element name="R2" library="fabPatil" package="1206" value="49" x="20.193" y="15.113"/>
 <element name="R3" library="fabPatil" package="1206" value="499" x="14.224" y="9.271" rot="R270"/>
 <element name="R4" library="fabPatil" package="1206" value="1K" x="18.288" y="7.747"/>
-<element name="JP1" library="fabPatil" package="1X06-SMD" value="" x="42.291" y="13.97" rot="R90"/>
+<element name="JP1" library="fabPatil" package="1X06-SMD" value="" x="41.783" y="14.732" rot="R90"/>
 <element name="C1" library="fabPatil" package="1206" value="0.1uF" x="16.129" y="19.304"/>
 <element name="JP2" library="fabPatil" package="USB_PCB" value="USBPCB" x="1.27" y="13.97"/>
-<element name="R5" library="fabPatil" package="1206" value="470" x="39.116" y="13.97" rot="R270"/>
-<element name="R6" library="fabPatil" package="1206" value="470" x="36.322" y="11.684" rot="R270"/>
-<element name="U$1" library="fabPatil" package="2X03SMD" value="AVRISPSMD" x="29.718" y="8.255" rot="R270"/>
-<element name="U$2" library="fabPatil" package="SOIC14" value="ATTINY441" x="28.448" y="18.288" rot="R270"/>
+<element name="R5" library="fabPatil" package="1206" value="470" x="38.608" y="14.732" rot="R270"/>
+<element name="R6" library="fabPatil" package="1206" value="470" x="35.814" y="12.446" rot="R270"/>
+<element name="U$1" library="fabPatil" package="2X03SMD" value="AVRISPSMD" x="29.21" y="9.017" rot="R270"/>
+<element name="U$2" library="fabPatil" package="SOIC14" value="ATTINY441" x="27.94" y="19.05" rot="R270"/>
 </elements>
 <signals>
 <signal name="GND">
@@ -484,16 +484,17 @@ design rules under a new name.</description>
 <wire x1="14.732" y1="19.05" x2="14.732" y2="16.686" width="0.4064" layer="1"/>
 <contactref element="U$2" pad="14"/>
 <contactref element="U$1" pad="6"/>
-<wire x1="14.707" y1="19.304" x2="14.707" y2="23.622" width="0.4064" layer="1"/>
-<wire x1="14.707" y1="23.622" x2="30.988" y2="23.622" width="0.4064" layer="1"/>
-<wire x1="30.988" y1="23.622" x2="30.988" y2="22.098" width="0.4064" layer="1"/>
-<wire x1="31.0515" y1="22.098" x2="30.988" y2="22.098" width="0.4064" layer="1"/>
-<wire x1="43.641" y1="20.32" x2="43.641" y2="22.098" width="0.4064" layer="1"/>
-<wire x1="43.641" y1="22.098" x2="31.0515" y2="22.098" width="0.4064" layer="1"/>
-<wire x1="27.178" y1="5.335" x2="27.178" y2="2.794" width="0.4064" layer="1"/>
-<wire x1="27.178" y1="2.794" x2="47.752" y2="2.794" width="0.4064" layer="1"/>
-<wire x1="47.752" y1="2.794" x2="47.752" y2="20.32" width="0.4064" layer="1"/>
-<wire x1="47.752" y1="20.32" x2="43.641" y2="20.32" width="0.4064" layer="1"/>
+<wire x1="14.707" y1="19.304" x2="14.707" y2="24.384" width="0.4064" layer="1"/>
+<wire x1="14.707" y1="24.384" x2="30.48" y2="24.384" width="0.4064" layer="1"/>
+<wire x1="30.48" y1="24.384" x2="30.48" y2="22.86" width="0.4064" layer="1"/>
+<wire x1="30.5435" y1="22.86" x2="30.48" y2="22.86" width="0.4064" layer="1"/>
+<wire x1="43.133" y1="21.082" x2="43.133" y2="22.86" width="0.4064" layer="1"/>
+<wire x1="43.133" y1="22.86" x2="30.5435" y2="22.86" width="0.4064" layer="1"/>
+<wire x1="26.67" y1="6.097" x2="26.67" y2="3.937" width="0.4064" layer="1"/>
+<wire x1="26.67" y1="3.937" x2="47.752" y2="3.937" width="0.4064" layer="1"/>
+<wire x1="47.625" y1="21.082" x2="43.133" y2="21.082" width="0.4064" layer="1"/>
+<wire x1="47.752" y1="3.937" x2="47.752" y2="20.955" width="0.4064" layer="1"/>
+<wire x1="47.752" y1="20.955" x2="47.625" y2="21.082" width="0.4064" layer="1"/>
 </signal>
 <signal name="VCC">
 <contactref element="R4" pad="2"/>
@@ -511,17 +512,17 @@ design rules under a new name.</description>
 <wire x1="19.71" y1="7.747" x2="20.193" y2="7.747" width="0.4064" layer="1"/>
 <contactref element="U$2" pad="1"/>
 <contactref element="U$1" pad="2"/>
-<wire x1="20.193" y1="22.098" x2="25.8445" y2="22.098" width="0.4064" layer="1"/>
-<wire x1="20.193" y1="22.098" x2="20.193" y2="19.812" width="0.4064" layer="1"/>
+<wire x1="20.193" y1="22.86" x2="25.3365" y2="22.86" width="0.4064" layer="1"/>
+<wire x1="20.193" y1="22.86" x2="20.193" y2="19.812" width="0.4064" layer="1"/>
 <wire x1="19.812" y1="7.747" x2="19.71" y2="7.747" width="0.4064" layer="1"/>
-<wire x1="25.8445" y1="22.098" x2="28.448" y2="22.098" width="0.3048" layer="1"/>
-<wire x1="28.448" y1="8.636" x2="28.448" y2="22.098" width="0.3048" layer="1"/>
-<wire x1="32.258" y1="5.335" x2="32.258" y2="8.636" width="0.3048" layer="1"/>
-<wire x1="32.258" y1="8.636" x2="28.448" y2="8.636" width="0.3048" layer="1"/>
-<wire x1="43.641" y1="15.24" x2="46.228" y2="15.24" width="0.4064" layer="1"/>
-<wire x1="46.228" y1="15.24" x2="46.228" y2="5.334" width="0.4064" layer="1"/>
-<wire x1="46.228" y1="5.334" x2="32.258" y2="5.334" width="0.4064" layer="1"/>
-<wire x1="32.258" y1="5.334" x2="32.258" y2="5.335" width="0.4064" layer="1"/>
+<wire x1="25.3365" y1="22.86" x2="27.94" y2="22.86" width="0.3048" layer="1"/>
+<wire x1="27.94" y1="9.398" x2="27.94" y2="22.86" width="0.3048" layer="1"/>
+<wire x1="31.75" y1="6.097" x2="31.75" y2="9.398" width="0.3048" layer="1"/>
+<wire x1="31.75" y1="9.398" x2="27.94" y2="9.398" width="0.3048" layer="1"/>
+<wire x1="43.133" y1="16.002" x2="46.101" y2="16.002" width="0.4064" layer="1"/>
+<wire x1="46.101" y1="16.002" x2="46.101" y2="6.096" width="0.4064" layer="1"/>
+<wire x1="46.101" y1="6.096" x2="31.75" y2="6.096" width="0.4064" layer="1"/>
+<wire x1="31.75" y1="6.096" x2="31.75" y2="6.097" width="0.4064" layer="1"/>
 </signal>
 <signal name="N$2">
 <contactref element="D2" pad="CATHODE"/>
@@ -559,12 +560,12 @@ design rules under a new name.</description>
 <vertex x="-2.54" y="19.05"/>
 <vertex x="-1.905" y="19.685"/>
 <vertex x="9.017" y="19.685"/>
-<vertex x="13.335" y="23.241"/>
-<vertex x="49.149" y="23.241"/>
-<vertex x="50.165" y="22.86" curve="-3.096315"/>
+<vertex x="13.462" y="25.781"/>
+<vertex x="49.149" y="25.527"/>
+<vertex x="50.165" y="23.876" curve="-3.096315"/>
 <vertex x="50.165" y="4.318"/>
-<vertex x="48.895" y="3.937"/>
-<vertex x="12.446" y="3.937"/>
+<vertex x="48.768" y="2.667"/>
+<vertex x="12.319" y="2.667"/>
 <vertex x="8.89" y="8.255"/>
 <vertex x="-1.905" y="8.255"/>
 <vertex x="-2.54" y="8.89"/>
@@ -573,82 +574,83 @@ design rules under a new name.</description>
 <signal name="N$7">
 <contactref element="R6" pad="2"/>
 <contactref element="JP1" pad="2"/>
-<wire x1="43.641" y1="10.16" x2="36.322" y2="10.16" width="0.4064" layer="1"/>
-<wire x1="36.322" y1="10.16" x2="36.322" y2="10.262" width="0.4064" layer="1"/>
+<wire x1="43.133" y1="10.922" x2="35.814" y2="10.922" width="0.4064" layer="1"/>
+<wire x1="35.814" y1="10.922" x2="35.814" y2="11.024" width="0.4064" layer="1"/>
 </signal>
 <signal name="N$8">
 <contactref element="R5" pad="2"/>
 <contactref element="JP1" pad="3"/>
-<wire x1="43.641" y1="12.7" x2="39.116" y2="12.7" width="0.4064" layer="1"/>
-<wire x1="39.116" y1="12.7" x2="39.116" y2="12.548" width="0.4064" layer="1"/>
+<wire x1="43.133" y1="13.462" x2="38.608" y2="13.462" width="0.4064" layer="1"/>
+<wire x1="38.608" y1="13.462" x2="38.608" y2="13.31" width="0.4064" layer="1"/>
 </signal>
 <signal name="MOSI">
 <contactref element="U$1" pad="4"/>
 <contactref element="U$2" pad="7"/>
-<wire x1="29.718" y1="5.335" x2="29.718" y2="7.62" width="0.3048" layer="1"/>
-<wire x1="29.718" y1="7.62" x2="25.908" y2="7.62" width="0.3048" layer="1"/>
-<wire x1="25.908" y1="7.62" x2="25.908" y2="14.478" width="0.3048" layer="1"/>
-<wire x1="25.908" y1="14.478" x2="25.8445" y2="14.478" width="0.3048" layer="1"/>
+<wire x1="29.21" y1="6.097" x2="29.21" y2="8.382" width="0.3048" layer="1"/>
+<wire x1="29.21" y1="8.382" x2="25.4" y2="8.382" width="0.3048" layer="1"/>
+<wire x1="25.4" y1="8.382" x2="25.4" y2="15.24" width="0.3048" layer="1"/>
+<wire x1="25.4" y1="15.24" x2="25.3365" y2="15.24" width="0.3048" layer="1"/>
 </signal>
 <signal name="RST">
 <contactref element="U$1" pad="5"/>
 <contactref element="U$2" pad="4"/>
-<wire x1="27.559" y1="18.288" x2="25.8445" y2="18.288" width="0.3048" layer="1"/>
-<wire x1="27.178" y1="10.795" x2="27.559" y2="11.176" width="0.3048" layer="1" curve="90"/>
-<wire x1="27.559" y1="11.176" x2="27.559" y2="18.288" width="0.3048" layer="1"/>
+<wire x1="27.051" y1="19.05" x2="25.3365" y2="19.05" width="0.3048" layer="1"/>
+<wire x1="26.67" y1="11.557" x2="27.051" y2="11.938" width="0.3048" layer="1" curve="90"/>
+<wire x1="27.051" y1="11.938" x2="27.051" y2="19.05" width="0.3048" layer="1"/>
 </signal>
 <signal name="SCK">
 <contactref element="U$1" pad="3"/>
 <contactref element="U$2" pad="9"/>
-<wire x1="29.464" y1="10.922" x2="29.718" y2="10.795" width="0.4064" layer="1" curve="90"/>
-<wire x1="29.718" y1="10.795" x2="29.2862" y2="11.3538" width="0.3048" layer="1"/>
-<wire x1="29.2862" y1="11.3538" x2="29.2862" y2="15.748" width="0.3048" layer="1"/>
-<wire x1="29.2862" y1="15.748" x2="31.0515" y2="15.748" width="0.3048" layer="1"/>
+<wire x1="28.956" y1="11.684" x2="29.21" y2="11.557" width="0.4064" layer="1" curve="90"/>
+<wire x1="29.21" y1="11.557" x2="28.7782" y2="12.1158" width="0.3048" layer="1"/>
+<wire x1="28.7782" y1="12.1158" x2="28.7782" y2="16.51" width="0.3048" layer="1"/>
+<wire x1="28.7782" y1="16.51" x2="30.5435" y2="16.51" width="0.3048" layer="1"/>
 </signal>
 <signal name="MISO">
 <contactref element="U$1" pad="1"/>
 <contactref element="U$2" pad="8"/>
-<wire x1="31.0515" y1="14.478" x2="32.258" y2="14.478" width="0.4064" layer="1"/>
-<wire x1="32.258" y1="14.478" x2="32.258" y2="10.795" width="0.4064" layer="1"/>
+<wire x1="30.5435" y1="15.24" x2="31.75" y2="15.24" width="0.4064" layer="1"/>
+<wire x1="31.75" y1="15.24" x2="31.75" y2="11.557" width="0.4064" layer="1"/>
 </signal>
 <signal name="N$9">
 <contactref element="R5" pad="1"/>
 <contactref element="U$2" pad="12"/>
-<wire x1="39.116" y1="15.392" x2="39.116" y2="19.558" width="0.4064" layer="1"/>
-<wire x1="39.116" y1="19.558" x2="31.0515" y2="19.558" width="0.4064" layer="1"/>
+<wire x1="38.608" y1="16.154" x2="38.608" y2="20.32" width="0.4064" layer="1"/>
+<wire x1="38.608" y1="20.32" x2="30.5435" y2="20.32" width="0.4064" layer="1"/>
 </signal>
 <signal name="N$10">
 <contactref element="R6" pad="1"/>
 <contactref element="U$2" pad="11"/>
-<wire x1="36.322" y1="13.106" x2="36.322" y2="18.288" width="0.4064" layer="1"/>
-<wire x1="36.322" y1="18.288" x2="31.0515" y2="18.288" width="0.4064" layer="1"/>
-</signal>
-<signal name="N$3">
-<contactref element="R2" pad="2"/>
-<contactref element="U$2" pad="5"/>
-<wire x1="25.8445" y1="17.018" x2="21.615" y2="17.018" width="0.4064" layer="1"/>
-<wire x1="21.615" y1="17.018" x2="21.615" y2="15.113" width="0.4064" layer="1"/>
-</signal>
-<signal name="N$4">
-<contactref element="U$2" pad="6"/>
-<contactref element="R1" pad="2"/>
-<wire x1="21.615" y1="11.557" x2="23.622" y2="11.557" width="0.4064" layer="1"/>
-<wire x1="23.622" y1="11.557" x2="23.622" y2="15.748" width="0.4064" layer="1"/>
-<wire x1="23.622" y1="15.748" x2="25.8445" y2="15.748" width="0.4064" layer="1"/>
+<wire x1="35.814" y1="13.868" x2="35.814" y2="19.05" width="0.4064" layer="1"/>
+<wire x1="35.814" y1="19.05" x2="30.5435" y2="19.05" width="0.4064" layer="1"/>
 </signal>
 <signal name="N$11">
 <contactref element="JP1" pad="5"/>
 <contactref element="U$2" pad="13"/>
-<wire x1="43.641" y1="17.78" x2="40.894" y2="17.78" width="0.4064" layer="1"/>
-<wire x1="40.894" y1="17.78" x2="40.894" y2="20.828" width="0.4064" layer="1"/>
-<wire x1="40.894" y1="20.828" x2="31.0515" y2="20.828" width="0.4064" layer="1"/>
+<wire x1="43.133" y1="18.542" x2="40.386" y2="18.542" width="0.4064" layer="1"/>
+<wire x1="40.386" y1="18.542" x2="40.386" y2="21.59" width="0.4064" layer="1"/>
+<wire x1="40.386" y1="21.59" x2="30.5435" y2="21.59" width="0.4064" layer="1"/>
 </signal>
 <signal name="N$12">
 <contactref element="U$2" pad="10"/>
 <contactref element="JP1" pad="1"/>
-<wire x1="31.0515" y1="17.018" x2="34.036" y2="17.018" width="0.4064" layer="1"/>
-<wire x1="34.036" y1="17.018" x2="34.036" y2="7.62" width="0.4064" layer="1"/>
-<wire x1="34.036" y1="7.62" x2="43.641" y2="7.62" width="0.4064" layer="1"/>
+<wire x1="30.5435" y1="17.78" x2="33.528" y2="17.78" width="0.4064" layer="1"/>
+<wire x1="33.528" y1="17.78" x2="33.528" y2="8.382" width="0.4064" layer="1"/>
+<wire x1="33.528" y1="8.382" x2="43.133" y2="8.382" width="0.4064" layer="1"/>
+</signal>
+<signal name="N$3">
+<contactref element="R2" pad="2"/>
+<contactref element="U$2" pad="3"/>
+<wire x1="21.615" y1="15.113" x2="21.615" y2="20.32" width="0.4064" layer="1"/>
+<wire x1="21.615" y1="20.32" x2="25.3365" y2="20.32" width="0.4064" layer="1"/>
+</signal>
+<signal name="N$4">
+<contactref element="R1" pad="2"/>
+<contactref element="U$2" pad="5"/>
+<wire x1="25.3365" y1="17.78" x2="23.368" y2="17.78" width="0.4064" layer="1"/>
+<wire x1="23.368" y1="17.78" x2="23.368" y2="11.43" width="0.4064" layer="1"/>
+<wire x1="23.368" y1="11.43" x2="21.615" y2="11.43" width="0.4064" layer="1"/>
+<wire x1="21.615" y1="11.43" x2="21.615" y2="11.557" width="0.4064" layer="1"/>
 </signal>
 </signals>
 </board>

FabFTDI Attiny441/FabFTDI.sch

@@ -537,7 +537,7 @@ For boards designed to be plugged directly into a USB slot. If possible, ensure
 <symbol name="ATTINY441">
 <pin name="VCC" x="-10.16" y="7.62" length="middle"/>
 <pin name="PB0/XTAL1" x="-10.16" y="5.08" length="middle"/>
-<pin name="PB1XTAL2" x="-10.16" y="2.54" length="middle"/>
+<pin name="PB1/XTAL2/INT0" x="-10.16" y="2.54" length="middle"/>
 <pin name="NRST" x="-10.16" y="0" length="middle"/>
 <pin name="PB2" x="-10.16" y="-2.54" length="middle"/>
 <pin name="PA7" x="-10.16" y="-5.08" length="middle"/>
@@ -779,7 +779,7 @@ Connector for USB-microB (orAB), USB-mini, and USB-PCB. For USB-micro use Digike
 <connect gate="G$1" pin="PA6/MOSI" pad="7"/>
 <connect gate="G$1" pin="PA7" pad="6"/>
 <connect gate="G$1" pin="PB0/XTAL1" pad="2"/>
-<connect gate="G$1" pin="PB1XTAL2" pad="3"/>
+<connect gate="G$1" pin="PB1/XTAL2/INT0" pad="3"/>
 <connect gate="G$1" pin="PB2" pad="5"/>
 <connect gate="G$1" pin="VCC" pad="1"/>
 </connects>
@@ -1092,24 +1092,6 @@ Connector for USB-microB (orAB), USB-mini, and USB-PCB. For USB-micro use Digike
 <wire x1="30.48" y1="7.62" x2="15.24" y2="7.62" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="N$3" class="0">
-<segment>
-<pinref part="R2" gate="G$1" pin="2"/>
-<wire x1="-50.8" y1="2.54" x2="-45.72" y2="2.54" width="0.1524" layer="91"/>
-<wire x1="-45.72" y1="2.54" x2="-43.18" y2="5.08" width="0.1524" layer="91"/>
-<pinref part="U$2" gate="G$1" pin="PB2"/>
-<wire x1="-43.18" y1="5.08" x2="-25.4" y2="5.08" width="0.1524" layer="91"/>
-</segment>
-</net>
-<net name="N$4" class="0">
-<segment>
-<pinref part="U$2" gate="G$1" pin="PA7"/>
-<wire x1="-25.4" y1="2.54" x2="-43.18" y2="2.54" width="0.1524" layer="91"/>
-<wire x1="-43.18" y1="2.54" x2="-45.72" y2="5.08" width="0.1524" layer="91"/>
-<pinref part="R1" gate="G$1" pin="2"/>
-<wire x1="-45.72" y1="5.08" x2="-53.34" y2="5.08" width="0.1524" layer="91"/>
-</segment>
-</net>
 <net name="N$11" class="0">
 <segment>
 <pinref part="JP1" gate="G$1" pin="CTS"/>
@@ -1128,6 +1110,22 @@ Connector for USB-microB (orAB), USB-mini, and USB-PCB. For USB-micro use Digike
 <wire x1="40.64" y1="15.24" x2="50.8" y2="15.24" width="0.1524" layer="91"/>
 </segment>
 </net>
+<net name="N$3" class="0">
+<segment>
+<pinref part="R2" gate="G$1" pin="2"/>
+<wire x1="-50.8" y1="2.54" x2="-45.72" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-45.72" y1="2.54" x2="-38.1" y2="10.16" width="0.1524" layer="91"/>
+<pinref part="U$2" gate="G$1" pin="PB1/XTAL2/INT0"/>
+<wire x1="-38.1" y1="10.16" x2="-25.4" y2="10.16" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$4" class="0">
+<segment>
+<pinref part="R1" gate="G$1" pin="2"/>
+<pinref part="U$2" gate="G$1" pin="PB2"/>
+<wire x1="-53.34" y1="5.08" x2="-25.4" y2="5.08" width="0.1524" layer="91"/>
+</segment>
+</net>
 </nets>
 </sheet>
 </sheets>

FabFTDI Attiny441/Programing/CDC/Changelog.txt

+This file documents changes in the firmware-only CDC driver for atmel's AVR
+microcontrollers. New entries are always appended to the end of the file.
+Scroll down to the bottom to see the most recent changes.
+
+* Release 2006-06-28
+
+  - Polling instead of using interrupt at UART processing (ATmega).
+  - Adapted to higher baud rate setting (ATmega).
+  - Reduced interrupt cycles in software UART (ATtiny).
+  - Removed zero-sized receive block in usbFunctionWriteOut().
+* Release 2006-07-18
+
+  - Added Rx_interrupt version for high speed transfer (ATmega).
+  - Changed maximum packet size to 6 for stable connection (ATmega).
+  - Configured USI to transmit data (ATtiny).
+  - Added test report.
+* Release 2006-08-28
+
+  - Adapted for new AVR-USB and WinAVR20070122.
+  - Modified to use maximum BULK_IN packet size in main.c.
+* Release 2007-04-07
+
+  - Adapted for new AVR-USB and WinAVR20070525.
+  - Shortened the polling interval of interrupt endpoint to 2mS.
+  - Avoided duplicate response at SET_CONTROL_LINE_STATE request.
+  - Sent zero sized packet on bulk-in endpoint after SETUP request.
+  - Enforce data toggling to DATA0 on interrupt and bulk-in endpoints after
+   usbInit().
+* Release 2007-07-07
+
+  - Released ATtiny2313 version.
+* Release 2007-10-03
+
+  - Fixed bug on ATtiny inverted version. (Thanks to Klaus Weglehner)
+  - Updated to the newest AVR-USB.
+* Release 2008-01-27
+
+  - Updated to the newest AVR-USB and enabled other clocks.
+  - Defined all configuration options into Makefile.
+  - Extended the interrupt polling interval.
+* Release 2008-08-25
+
+  - Expanded the bulk-IN packet size to 8 bytes. (ATtiny2313)
+  - Remade the data buffering to achieve the higher baudrates. (ATtiny2313)
+  - Implemented three baudrates using port bits selection. (ATtiny2313)
+* Release 2009-01-26
+
+  - Corrected ATmega8 fuse bit(CKOPT=0). (Thanks to Rene Staffen)
+  - Merged all AVR versions to one.
+* Release 2009-07-20
+
+  - Stabilized RC oscillator calibration. (ATtiny45)
+  - Supported the baudrate configuration. (ATtiny2313)
+  - Added control lines (DTR,RTS,CTS). (ATmega48)
+  - Added software inverters. (ATmega48)
+  - Improved performance. (ATmega8/48)
+  - Updated to the newest V-USB.
+* Release 2010-02-28
+
+  - Fixed UART_INVERT bug. (ATtiny45)
+  - Added the X'tal version. (ATtiny45xtal)
+  - Added control lines (DTR,RTS,CTS) at 16/20MHz. (ATtiny2313)
+  - Updated to the newest V-USB.
+* Release 2011-06-24
+
+

FabFTDI Attiny441/Programing/CDC/mega48/cdcmega.aps

+<AVRStudio><MANAGEMENT><ProjectName>cdcmega</ProjectName><Created>20-Mar-2007 23:09:35</Created><LastEdit>24-Jun-2011 14:45:55</LastEdit><ICON>241</ICON><ProjectType>0</ProjectType><Created>20-Mar-2007 23:09:35</Created><Version>4</Version><Build>4, 13, 0, 528</Build><ProjectTypeName>AVR GCC</ProjectTypeName></MANAGEMENT><CODE_CREATION><ObjectFile>default\cdcmega.elf</ObjectFile><EntryFile></EntryFile><SaveFolder>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\</SaveFolder></CODE_CREATION><DEBUG_TARGET><CURRENT_TARGET>AVR Simulator</CURRENT_TARGET><CURRENT_PART>ATmega48.xml</CURRENT_PART><BREAKPOINTS></BREAKPOINTS><IO_EXPAND><HIDE>false</HIDE></IO_EXPAND><REGISTERNAMES><Register>R00</Register><Register>R01</Register><Register>R02</Register><Register>R03</Register><Register>R04</Register><Register>R05</Register><Register>R06</Register><Register>R07</Register><Register>R08</Register><Register>R09</Register><Register>R10</Register><Register>R11</Register><Register>R12</Register><Register>R13</Register><Register>R14</Register><Register>R15</Register><Register>R16</Register><Register>R17</Register><Register>R18</Register><Register>R19</Register><Register>R20</Register><Register>R21</Register><Register>R22</Register><Register>R23</Register><Register>R24</Register><Register>R25</Register><Register>R26</Register><Register>R27</Register><Register>R28</Register><Register>R29</Register><Register>R30</Register><Register>R31</Register></REGISTERNAMES><COM>Auto</COM><COMType>0</COMType><WATCHNUM>0</WATCHNUM><WATCHNAMES><Pane0></Pane0><Pane1></Pane1><Pane2></Pane2><Pane3></Pane3></WATCHNAMES><BreakOnTrcaeFull>0</BreakOnTrcaeFull></DEBUG_TARGET><Debugger><Triggers></Triggers></Debugger><AVRGCCPLUGIN><FILES><SOURCEFILE>uart.c</SOURCEFILE><SOURCEFILE>main.c</SOURCEFILE><SOURCEFILE>..\usbdrv\usbdrv.c</SOURCEFILE><SOURCEFILE>..\usbdrv\usbdrvasm.S</SOURCEFILE><SOURCEFILE>..\usbdrv\oddebug.c</SOURCEFILE><HEADERFILE>usbconfig.h</HEADERFILE><HEADERFILE>uart.h</HEADERFILE><HEADERFILE>..\usbdrv\oddebug.h</HEADERFILE><HEADERFILE>..\usbdrv\usbdrv.h</HEADERFILE><HEADERFILE>..\usbdrv\usbportability.h</HEADERFILE><OTHERFILE>default\cdcmega.lss</OTHERFILE><OTHERFILE>default\Makefile</OTHERFILE></FILES><CONFIGS><CONFIG><NAME>default</NAME><USESEXTERNALMAKEFILE>YES</USESEXTERNALMAKEFILE><EXTERNALMAKEFILE>default\Makefile</EXTERNALMAKEFILE><PART>atmega48</PART><HEX>1</HEX><LIST>1</LIST><MAP>0</MAP><OUTPUTFILENAME>cdcmega.elf</OUTPUTFILENAME><OUTPUTDIR>default\</OUTPUTDIR><ISDIRTY>1</ISDIRTY><OPTIONS/><INCDIRS><INCLUDE>.\</INCLUDE><INCLUDE>..\usbdrv\</INCLUDE></INCDIRS><LIBDIRS/><LIBS/><LINKOBJECTS/><OPTIONSFORALL>-Wall -gdwarf-2   -DF_CPU=12000000UL -Os -fsigned-char</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>C:\Program Files\WinAVR\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>C:\Program Files\WinAVR\utils\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><ProjectFiles><Files><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\usbconfig.h</Name><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\uart.h</Name><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\..\usbdrv\oddebug.h</Name><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\..\usbdrv\usbdrv.h</Name><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\..\usbdrv\usbportability.h</Name><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\uart.c</Name><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\main.c</Name><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\..\usbdrv\usbdrv.c</Name><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\..\usbdrv\usbdrvasm.S</Name><Name>C:\Project\Recursion\AVR-CDC\cdc232.2011-03-11\mega48\..\usbdrv\oddebug.c</Name></Files></ProjectFiles><IOView><usergroups/><sort sorted="0" column="0" ordername="0" orderaddress="0" ordergroup="0"/></IOView><Files></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio>