Commit b945c233 authored by Alexandre Kaspar's avatar Alexandre Kaspar

Horizontal table

parent 01c14135
Pipeline #4520 passed with stage
in 1 second
......@@ -332,15 +332,9 @@ Let's deconstruct that:
Or in a table:
| `CKDIV8` | 0 |
| -------- | - |
| `CKOUT` | 1 |
| `SUT1` | 0 |
| `SUT0` | 1 |
| `CKSEL3` | 1 |
| `CKSEL2` | 1 |
| `CKSEL1` | 1 |
| `CKSEL0` | 0 |
| Fuse | `CKDIV8` | `CKOUT` | `SUT1` | `SUT0` | `CKSEL3` | `CKSEL2` | `CKSEL1` | `CKSEL0` |
| ---- | -------- | ------- | ------ | ------ | -------- | -------- | -------- | -------- |
| Value | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 |
The last four bits are about the clock selection, and their default value `0010` stands for the 8MHz internal RC oscillator as source of the clock.
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